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ab92b38a01
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
31 lines
594 B
C
31 lines
594 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*/
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#ifndef __X86_CACHE_H__
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#define __X86_CACHE_H__
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/*
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* Use CONFIG_SYS_CACHELINE_SIZE (which is set to 64-bytes) for DMA alignment.
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*/
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#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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static inline void wbinvd(void)
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{
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asm volatile ("wbinvd" : : : "memory");
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}
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static inline void invd(void)
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{
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asm volatile("invd" : : : "memory");
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}
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/* Enable caches and write buffer */
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void enable_caches(void);
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/* Disable caches and write buffer */
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void disable_caches(void);
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#endif /* __X86_CACHE_H__ */
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