mirror of
https://github.com/smaeul/u-boot.git
synced 2025-11-03 21:48:15 +00:00
336d4615f8
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
184 lines
4.1 KiB
C
184 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Freescale MPC83xx GPIO handling.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <mpc83xx.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
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#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0
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#endif
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#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
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#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0
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#endif
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#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
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#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
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#endif
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#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
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#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
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#endif
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#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE
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#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0
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#endif
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#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE
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#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0
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#endif
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static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS];
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/*
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* Generic_GPIO primitives.
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*/
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int gpio_request(unsigned gpio, const char *label)
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{
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if (gpio >= MAX_NUM_GPIOS)
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return -1;
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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/* Do not set to input */
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return 0;
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}
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/* set GPIO pin 'gpio' as an input */
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int gpio_direction_input(unsigned gpio)
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{
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immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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unsigned int ctrlr;
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unsigned int line;
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unsigned int line_mask;
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/* 32-bits per controller */
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ctrlr = gpio >> 5;
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line = gpio & (0x1F);
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/* Big endian */
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line_mask = 1 << (31 - line);
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clrbits_be32(&im->gpio[ctrlr].dir, line_mask);
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return 0;
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}
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/* set GPIO pin 'gpio' as an output, with polarity 'value' */
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int gpio_direction_output(unsigned gpio, int value)
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{
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immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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unsigned int ctrlr;
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unsigned int line;
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unsigned int line_mask;
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if (value != 0 && value != 1) {
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printf("Error: Value parameter must be 0 or 1.\n");
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return -1;
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}
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gpio_set_value(gpio, value);
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/* 32-bits per controller */
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ctrlr = gpio >> 5;
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line = gpio & (0x1F);
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/* Big endian */
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line_mask = 1 << (31 - line);
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/* Make the line output */
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setbits_be32(&im->gpio[ctrlr].dir, line_mask);
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return 0;
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}
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/* read GPIO IN value of pin 'gpio' */
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int gpio_get_value(unsigned gpio)
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{
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immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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unsigned int ctrlr;
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unsigned int line;
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unsigned int line_mask;
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/* 32-bits per controller */
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ctrlr = gpio >> 5;
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line = gpio & (0x1F);
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/* Big endian */
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line_mask = 1 << (31 - line);
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/* Read the value and mask off the bit */
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return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0;
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}
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/* write GPIO OUT value to pin 'gpio' */
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int gpio_set_value(unsigned gpio, int value)
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{
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immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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unsigned int ctrlr;
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unsigned int line;
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unsigned int line_mask;
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if (value != 0 && value != 1) {
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printf("Error: Value parameter must be 0 or 1.\n");
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return -1;
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}
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/* 32-bits per controller */
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ctrlr = gpio >> 5;
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line = gpio & (0x1F);
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/* Big endian */
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line_mask = 1 << (31 - line);
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/* Update the local output buffer soft copy */
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gpio_output_value[ctrlr] =
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(gpio_output_value[ctrlr] & ~line_mask) | \
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(value ? line_mask : 0);
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/* Write the output */
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out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]);
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return 0;
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}
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/* Configure GPIO registers early */
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void mpc83xx_gpio_init_f(void)
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{
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immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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#if MPC83XX_GPIO_CTRLRS >= 1
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out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION);
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out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN);
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out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE);
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out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */
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out_be32(&im->gpio[0].imr, 0);
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out_be32(&im->gpio[0].icr, 0);
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#endif
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#if MPC83XX_GPIO_CTRLRS >= 2
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out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION);
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out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN);
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out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE);
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out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */
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out_be32(&im->gpio[1].imr, 0);
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out_be32(&im->gpio[1].icr, 0);
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#endif
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}
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/* Initialize GPIO soft-copies */
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void mpc83xx_gpio_init_r(void)
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{
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#if MPC83XX_GPIO_CTRLRS >= 1
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gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE;
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#endif
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#if MPC83XX_GPIO_CTRLRS >= 2
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gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE;
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#endif
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}
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