Hou Zhiqiang 059d942283 armv8: lx2160a: add MMU table entries for PCIe ...

The lx2160a have up to 6 PCIe controllers and have different
address and size of PCIe region.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

2019-05-22 12:24:24 +05:30

..

arc

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

arm

armv8: lx2160a: add MMU table entries for PCIe

2019-05-22 12:24:24 +05:30

m68k

m68k: ColdFire mcf5441x, add eSDHC support

2018-09-16 00:01:13 +02:00

microblaze

spl: fix linker size check off-by-one errors

2019-05-05 08:48:50 -04:00

mips

net: mscc: ocelot: Update DTS for Luton pcb90

2019-05-03 16:46:36 +02:00

nds32

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

nios2

.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore

2018-06-18 14:43:12 -04:00

powerpc

mpc83xx: Add gazerbeam board

2019-05-21 08:03:38 +02:00

riscv

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

sandbox

Various minor sandbox iumprovements

2019-04-24 12:27:29 -04:00

sh

sh: sh3: Remove CPU support

2019-05-10 22:43:18 +02:00

x86

x86: coreboot: make it possible to process unhandled tags

2019-05-19 16:17:33 +08:00

xtensa

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

.gitignore

…

Kconfig

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

2019-05-09 12:36:17 -04:00