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0a668f6d38
This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
59 lines
972 B
C
59 lines
972 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* https://spdx.org/licenses
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*/
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/psci.h>
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#include <asm/ptrace.h>
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#include <asm/system.h>
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#include <asm/arch/smc.h>
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DECLARE_GLOBAL_DATA_PTR;
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ssize_t smc_dram_size(unsigned int node)
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{
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struct pt_regs regs;
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regs.regs[0] = OCTEONTX2_DRAM_SIZE;
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regs.regs[1] = node;
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smc_call(®s);
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return regs.regs[0];
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}
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ssize_t smc_disable_rvu_lfs(unsigned int node)
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{
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struct pt_regs regs;
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regs.regs[0] = OCTEONTX2_DISABLE_RVU_LFS;
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regs.regs[1] = node;
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smc_call(®s);
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return regs.regs[0];
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}
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ssize_t smc_configure_ooo(unsigned int val)
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{
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struct pt_regs regs;
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regs.regs[0] = OCTEONTX2_CONFIG_OOO;
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regs.regs[1] = val;
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smc_call(®s);
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return regs.regs[0];
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}
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ssize_t smc_flsf_fw_booted(void)
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{
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struct pt_regs regs;
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regs.regs[0] = OCTEONTX2_FSAFE_PR_BOOT_SUCCESS;
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smc_call(®s);
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return regs.regs[0];
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}
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