mirror of
https://github.com/smaeul/u-boot.git
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f14ae4180a
This patch brings the lwmon5 board support up-to-date. Here a summary of the changes: lwmon5 board port related: - GPIO's changed to control the LSB transmitter - Reset USB PHY's upon power-up - Enable CAN upon power-up - USB init error workaround (errata CHIP_6) - EBC: Enable burstmode and modify the timings for the GDC memory - EBC: Speed up NOR flash timings lwmon5 board POST related: - Add FPGA memory test - Add GDC memory test - DSP POST reworked - SYSMON POST: Fix handling of negative temperatures - Add output for sysmon1 POST - HW-watchdog min. time test reworked Additionally some coding-style changes were done. Signed-off-by: Sascha Laue <sascha.laue@liebherr.com> Signed-off-by: Stefan Roese <sr@denx.de>
122 lines
3.1 KiB
C
122 lines
3.1 KiB
C
/*
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* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
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*
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* Developed for DENX Software Engineering GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/* There are two tests for dsPIC currently implemented:
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* 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
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* 2. dsPIC POST result test. This test gets dsPIC POST codes and version.
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*/
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#include <post.h>
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#include <i2c.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define DSPIC_POST_ERROR_REG 0x800
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#define DSPIC_SYS_ERROR_REG 0x802
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#define DSPIC_SYS_VERSION_REG 0x804
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#define DSPIC_FW_VERSION_REG 0x808
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#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
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/* Verify that dsPIC ready test done early at hw init passed ok */
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int dspic_init_post_test(int flags)
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{
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if (in_be32((void *)CONFIG_SYS_DSPIC_TEST_ADDR) &
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CONFIG_SYS_DSPIC_TEST_MASK) {
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post_log("dsPIC init test failed\n");
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return 1;
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}
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return 0;
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}
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#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC1 */
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#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
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/* Read a register from the dsPIC. */
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int dspic_read(ushort reg, ushort *data)
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{
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uchar buf[sizeof(*data)];
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int rval;
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if (i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
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return -1;
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rval = i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, sizeof(reg),
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buf, sizeof(*data));
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*data = (buf[0] << 8) | buf[1];
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return rval;
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}
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/* Verify error codes regs, display version */
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int dspic_post_test(int flags)
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{
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ushort data;
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int ret = 0;
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post_log("\n");
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/* read dspic FW-Version */
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if (dspic_read(DSPIC_FW_VERSION_REG, &data)) {
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post_log("dsPIC: failed read FW-Version\n");
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ret = 1;
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} else {
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post_log("dsPIC FW-Version: %u.%u\n",
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(data >> 8) & 0xFF, data & 0xFF);
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}
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/* read dspic SYS-Version */
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if (dspic_read(DSPIC_SYS_VERSION_REG, &data)) {
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post_log("dsPIC: failed read version\n");
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ret = 1;
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} else {
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post_log("dsPIC SYS-Version: %u.%u\n",
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(data >> 8) & 0xFF, data & 0xFF);
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}
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/* read dspic POST error code */
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if (dspic_read(DSPIC_POST_ERROR_REG, &data)) {
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post_log("dsPIC: failed read POST code\n");
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ret = 1;
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} else {
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post_log("dsPIC POST-ERROR code: 0x%04X\n", data);
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}
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/* read dspic SYS error code */
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if ((data = dspic_read(DSPIC_SYS_ERROR_REG, &data))) {
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post_log("dsPIC: failed read system error\n");
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ret = 1;
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} else {
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post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
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}
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return ret;
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}
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#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC2 */
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