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8b2a31f133
Add i.MX8 support, there are 8 GPIO banks. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
22 lines
480 B
C
22 lines
480 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2018 NXP
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*/
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#ifndef __ASM_ARCH_IMX8_GPIO_H
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#define __ASM_ARCH_IMX8_GPIO_H
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
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/* GPIO registers */
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struct gpio_regs {
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u32 gpio_dr; /* data */
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u32 gpio_dir; /* direction */
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u32 gpio_psr; /* pad satus */
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};
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#endif
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/* IMX8 the GPIO index is from 0 not 1 */
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#define IMX_GPIO_NR(port, index) (((port) * 32) + ((index) & 31))
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#endif /* __ASM_ARCH_IMX8_GPIO_H */
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