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The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
11 lines
271 B
C
11 lines
271 B
C
#ifndef _XTENSA_STRING_H
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#define _XTENSA_STRING_H
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/*
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* Use the generic string functions in U-Boot's lib_generic.
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* In the boot loader we care about compactness more than performance.
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* Prototypes will be taken from <linux/string.h>
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*/
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#endif /* _XTENSA_STRING_H */
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