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				https://github.com/smaeul/u-boot.git
				synced 2025-11-04 05:50:17 +00:00 
			
		
		
		
	This converts the following to Kconfig: CONFIG_RMII Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
		
			
				
	
	
		
			116 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			116 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * (C) Copyright 2011
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 * egnite GmbH <info@egnite.de>
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 *
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 * Configuation settings for Ethernut 5 with AT91SAM9XE.
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 */
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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/* The first stage boot loader expects u-boot running at this address. */
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/* The first stage boot loader takes care of low level initialization. */
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/* CPU information */
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* 18.432 MHz crystal */
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/* 32kB internal SRAM */
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#define CONFIG_SRAM_BASE	0x00300000 /*AT91SAM9XE_SRAM_BASE */
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#define CONFIG_SRAM_SIZE	(32 << 10)
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#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
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				GENERATED_GBL_DATA_SIZE)
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/* 128MB SDRAM in 1 bank */
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#define CONFIG_SYS_SDRAM_BASE		0x20000000
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#define CONFIG_SYS_SDRAM_SIZE		(128 << 20)
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/* 512kB on-chip NOR flash */
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# define CONFIG_SYS_FLASH_BASE		0x00200000 /* AT91SAM9XE_FLASH_BASE */
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# define CONFIG_SYS_MAX_FLASH_SECT	32
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# define CONFIG_EFLASH_PROTSECTORS	1
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE	1
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#define CONFIG_SYS_NAND_BASE		0x40000000
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#define CONFIG_SYS_NAND_DBW_8
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PC(14)
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#endif
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/* JFFS2 */
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/* Ethernet */
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#define CONFIG_PHY_ID			0
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#define CONFIG_MACB_SEARCH_PHY
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/* MMC */
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_SYS_MMC_CD_PIN		AT91_PIO_PORTC, 8
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00500000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"host"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
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#endif
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/* RTC */
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#if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
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#define CONFIG_SYS_I2C_RTC_ADDR		0x51
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#endif
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/* I2C */
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#define CONFIG_SYS_MAX_I2C_BUS	1
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#define I2C_SOFT_DECLARATIONS
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#define GPIO_I2C_SCL		AT91_PIO_PORTA, 24
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#define GPIO_I2C_SDA		AT91_PIO_PORTA, 23
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#define I2C_INIT { \
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	at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
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	at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
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	at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
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	at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
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	at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
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}
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#define I2C_ACTIVE	at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
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#define I2C_TRISTATE	at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
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#define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
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#define I2C_SDA(bit)	at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
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#define I2C_DELAY	udelay(100)
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#define I2C_READ	at91_get_pio_value(AT91_PIO_PORTA, 23)
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/* DHCP/BOOTP options */
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#ifdef CONFIG_CMD_DHCP
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#define CONFIG_SYS_AUTOLOAD	"n"
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#endif
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/* File systems */
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/* Boot command */
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/* Misc. u-boot settings */
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#endif
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