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	Pull in the recent changes to the RZ/G2L device tree and related dtsi files so that we're aligned with Linux v6.7 (commit 0dd3ee311255). Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
		
			
				
	
	
		
			184 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			184 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| /*
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|  * Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
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|  *
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|  * Copyright (C) 2022 Renesas Electronics Corp.
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|  */
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| 
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| #include <dt-bindings/gpio/gpio.h>
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| #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
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| 
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| /*
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|  * SSI-WM8978
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|  *
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|  * This command is required when Playback/Capture
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|  *
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|  *	amixer cset name='Left Input Mixer L2 Switch' on
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|  *	amixer cset name='Right Input Mixer R2 Switch' on
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|  *	amixer cset name='Headphone Playback Volume' 100
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|  *	amixer cset name='PCM Volume' 100%
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|  *	amixer cset name='Input PGA Volume' 25
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|  *
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|  */
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| 
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| / {
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| 	aliases {
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| 		serial0 = &scif0;
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| 		i2c0 = &i2c0;
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| 		i2c1 = &i2c1;
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| 	};
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	snd_rzg2l: sound {
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| 		compatible = "simple-audio-card";
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| 		simple-audio-card,format = "i2s";
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| 		simple-audio-card,bitclock-master = <&cpu_dai>;
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| 		simple-audio-card,frame-master = <&cpu_dai>;
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| 		simple-audio-card,mclk-fs = <256>;
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| 
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| 		simple-audio-card,widgets = "Microphone", "Microphone Jack";
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| 		simple-audio-card,routing =
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| 			    "L2", "Mic Bias",
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| 			    "R2", "Mic Bias",
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| 			    "Mic Bias", "Microphone Jack";
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| 
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| 		cpu_dai: simple-audio-card,cpu {
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| 		};
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| 
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| 		codec_dai: simple-audio-card,codec {
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| 			clocks = <&versa3 2>;
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| 			sound-dai = <&wm8978>;
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| 		};
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| 	};
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| 
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| 	usb0_vbus_otg: regulator-usb0-vbus-otg {
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| 		compatible = "regulator-fixed";
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| 
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| 		regulator-name = "USB0_VBUS_OTG";
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| 		regulator-min-microvolt = <5000000>;
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| 		regulator-max-microvolt = <5000000>;
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| 	};
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| 
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| 	vccq_sdhi1: regulator-vccq-sdhi1 {
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| 		compatible = "regulator-gpio";
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| 		regulator-name = "SDHI1 VccQ";
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| 		regulator-min-microvolt = <1800000>;
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| 		regulator-max-microvolt = <3300000>;
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| 		gpios-states = <1>;
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| 		states = <3300000 1>, <1800000 0>;
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| 	};
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| 
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| 	x1: x1-clock {
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| 		compatible = "fixed-clock";
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| 		#clock-cells = <0>;
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| 		clock-frequency = <24000000>;
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| 	};
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| };
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| 
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| &audio_clk1 {
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| 	clock-frequency = <11289600>;
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| };
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| 
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| &audio_clk2 {
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| 	clock-frequency = <12288000>;
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| };
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| 
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| &canfd {
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| 	pinctrl-0 = <&can0_pins &can1_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| 
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| 	channel0 {
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| 		status = "okay";
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| 	};
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| 
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| 	channel1 {
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| 		status = "okay";
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| 	};
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| };
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| 
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| &ehci0 {
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| 	dr_mode = "otg";
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| 	status = "okay";
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| };
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| 
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| &ehci1 {
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| 	status = "okay";
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| };
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| 
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| &hsusb {
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| 	dr_mode = "otg";
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| 	status = "okay";
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| };
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| 
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| &i2c0 {
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| 	pinctrl-0 = <&i2c0_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	status = "okay";
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| };
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| 
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| &i2c1 {
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| 	pinctrl-0 = <&i2c1_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	status = "okay";
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| };
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| 
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| &ohci0 {
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| 	dr_mode = "otg";
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| 	status = "okay";
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| };
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| 
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| &ohci1 {
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| 	status = "okay";
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| };
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| 
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| &phyrst {
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| 	status = "okay";
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| };
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| 
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| &scif0 {
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| 	pinctrl-0 = <&scif0_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| };
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| 
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| &sdhi1 {
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| 	pinctrl-0 = <&sdhi1_pins>;
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| 	pinctrl-1 = <&sdhi1_pins_uhs>;
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| 	pinctrl-names = "default", "state_uhs";
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| 
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| 	vmmc-supply = <®_3p3v>;
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| 	vqmmc-supply = <&vccq_sdhi1>;
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| 	bus-width = <4>;
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| 	sd-uhs-sdr50;
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| 	sd-uhs-sdr104;
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| 	status = "okay";
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| };
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| 
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| &spi1 {
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| 	pinctrl-0 = <&spi1_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	status = "okay";
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| };
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| 
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| &usb2_phy0 {
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| 	pinctrl-0 = <&usb0_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	vbus-supply = <&usb0_vbus_otg>;
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| 	status = "okay";
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| };
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| 
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| &usb2_phy1 {
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| 	pinctrl-0 = <&usb1_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	status = "okay";
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| };
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