mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-31 03:58:17 +00:00
da880bf7c1
After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode" series flash speed and mode wasn't passed to driver anymore, which resulted in: Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default environment Fix it by syncing SPI node of affected device dts with Linux kernel dts. The changed SPI bus frequency doesn't influence stability of read/write operations. Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
142 lines
2.7 KiB
Plaintext
142 lines
2.7 KiB
Plaintext
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "Compulab TrimSlice board";
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compatible = "compulab,trimslice", "nvidia,tegra20";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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usb0 = "/usb@c5000000";
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mmc0 = "/sdhci@c8000600";
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mmc1 = "/sdhci@c8000000";
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spi0 = "/spi@7000c380";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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serial@70006000 {
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clock-frequency = <216000000>;
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};
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spi@7000c380 {
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status = "okay";
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spi-max-frequency = <48000000>;
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flash@0 {
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compatible = "winbond,w25q80bl", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <48000000>;
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};
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};
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pcie@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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avdd-plle-supply = <&pci_vdd_reg>;
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vddio-pex-clk-supply = <&pci_clk_reg>;
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pci@1,0 {
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status = "okay";
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};
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};
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usb@c5000000 {
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status = "okay";
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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};
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sdhci@c8000000 {
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status = "okay";
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bus-width = <4>;
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};
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sdhci@c8000600 {
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status = "okay";
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cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_vdd_reg: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "avdd_hdmi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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hdmi_pll_reg: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "avdd_hdmi_pll";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vbus_reg: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usb1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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};
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pci_clk_reg: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "pci_clk";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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pci_vdd_reg: regulator@4 {
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compatible = "regulator-fixed";
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reg = <4>;
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regulator-name = "pci_vdd";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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regulator-always-on;
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};
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};
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};
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&uarta {
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status = "okay";
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};
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