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smaeul-u-boot/drivers/ddr
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York Sun 3d75ec95f5 driver/ddr: Fix DDR register timing_cfg_8 
The field wrtord_bg should add 2 clocks if on the fly chop is enabled,
according to DDR controller manual for DDR4.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-07-22 16:25:55 -07:00
..
fsl
driver/ddr: Fix DDR register timing_cfg_8
2014-07-22 16:25:55 -07:00