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	Currently {read,write}s{b,w,lq}() functions are available only on some
architectures, and there are no io{read,write}{8,16,32,64}_rep()
functions in u-boot. This patch adds generic versions that may be used
without arch-specific implementation.
Since some of added functions were already added locally in some files,
remove them to avoid redeclaration errors.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
		
	
			
		
			
				
	
	
		
			458 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			458 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Generic I/O functions.
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|  *
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|  * Copyright (c) 2016 Imagination Technologies Ltd.
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|  */
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| 
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| #ifndef __ASM_GENERIC_IO_H__
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| #define __ASM_GENERIC_IO_H__
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| 
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| /*
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|  * This file should be included at the end of each architecture-specific
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|  * asm/io.h such that we may provide generic implementations without
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|  * conflicting with architecture-specific code.
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|  */
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| 
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| #ifndef __ASSEMBLY__
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| 
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| /**
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|  * phys_to_virt() - Return a virtual address mapped to a given physical address
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|  * @paddr: the physical address
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|  *
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|  * Returns a virtual address which the CPU can access that maps to the physical
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|  * address @paddr. This should only be used where it is known that no dynamic
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|  * mapping is required. In general, map_physmem should be used instead.
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|  *
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|  * Returns: a virtual address which maps to @paddr
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|  */
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| #ifndef phys_to_virt
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| static inline void *phys_to_virt(phys_addr_t paddr)
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| {
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| 	return (void *)(unsigned long)paddr;
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| }
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| #endif
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| 
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| /**
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|  * virt_to_phys() - Return the physical address that a virtual address maps to
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|  * @vaddr: the virtual address
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|  *
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|  * Returns the physical address which the CPU-accessible virtual address @vaddr
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|  * maps to.
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|  *
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|  * Returns: the physical address which @vaddr maps to
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|  */
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| #ifndef virt_to_phys
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| static inline phys_addr_t virt_to_phys(void *vaddr)
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| {
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| 	return (phys_addr_t)((unsigned long)vaddr);
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| }
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| #endif
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| 
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| /*
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|  * Flags for use with map_physmem() & unmap_physmem(). Architectures need not
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|  * support all of these, in which case they will be defined as zero here &
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|  * ignored. Callers that may run on multiple architectures should therefore
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|  * treat them as hints rather than requirements.
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|  */
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| #ifndef MAP_NOCACHE
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| # define MAP_NOCACHE	0	/* Produce an uncached mapping */
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| #endif
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| #ifndef MAP_WRCOMBINE
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| # define MAP_WRCOMBINE	0	/* Allow write-combining on the mapping */
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| #endif
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| #ifndef MAP_WRBACK
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| # define MAP_WRBACK	0	/* Map using write-back caching */
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| #endif
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| #ifndef MAP_WRTHROUGH
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| # define MAP_WRTHROUGH	0	/* Map using write-through caching */
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| #endif
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| 
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| /**
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|  * map_physmem() - Return a virtual address mapped to a given physical address
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|  * @paddr: the physical address
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|  * @len: the length of the required mapping
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|  * @flags: flags affecting the type of mapping
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|  *
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|  * Return a virtual address through which the CPU may access the memory at
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|  * physical address @paddr. The mapping will be valid for at least @len bytes,
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|  * and may be affected by flags passed to the @flags argument. This function
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|  * may create new mappings, so should generally be paired with a matching call
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|  * to unmap_physmem once the caller is finished with the memory in question.
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|  *
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|  * Returns: a virtual address suitably mapped to @paddr
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|  */
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| #ifndef map_physmem
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| static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
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| 				unsigned long flags)
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| {
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| 	return phys_to_virt(paddr);
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| }
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| #endif
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| 
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| /**
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|  * unmap_physmem() - Remove mappings created by a prior call to map_physmem()
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|  * @vaddr: the virtual address which map_physmem() previously returned
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|  * @flags: flags matching those originally passed to map_physmem()
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|  *
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|  * Unmap memory which was previously mapped by a call to map_physmem(). If
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|  * map_physmem() dynamically created a mapping for the memory in question then
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|  * unmap_physmem() will remove that mapping.
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|  */
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| #ifndef unmap_physmem
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| static inline void unmap_physmem(void *vaddr, unsigned long flags)
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| {
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| }
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| #endif
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| 
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| /*
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|  * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
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|  *
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|  * On some architectures memory mapped IO needs to be accessed differently.
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|  * On the simple architectures, we just read/write the memory location
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|  * directly.
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|  */
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| 
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| #ifndef __raw_readb
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| #define __raw_readb __raw_readb
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| static inline u8 __raw_readb(const volatile void __iomem *addr)
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| {
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| 	return *(const volatile u8 __force *)addr;
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| }
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| #endif
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| 
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| #ifndef __raw_readw
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| #define __raw_readw __raw_readw
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| static inline u16 __raw_readw(const volatile void __iomem *addr)
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| {
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| 	return *(const volatile u16 __force *)addr;
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| }
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| #endif
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| 
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| #ifndef __raw_readl
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| #define __raw_readl __raw_readl
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| static inline u32 __raw_readl(const volatile void __iomem *addr)
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| {
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| 	return *(const volatile u32 __force *)addr;
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef __raw_readq
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| #define __raw_readq __raw_readq
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| static inline u64 __raw_readq(const volatile void __iomem *addr)
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| {
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| 	return *(const volatile u64 __force *)addr;
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| #ifndef __raw_writeb
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| #define __raw_writeb __raw_writeb
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| static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
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| {
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| 	*(volatile u8 __force *)addr = value;
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| }
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| #endif
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| 
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| #ifndef __raw_writew
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| #define __raw_writew __raw_writew
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| static inline void __raw_writew(u16 value, volatile void __iomem *addr)
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| {
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| 	*(volatile u16 __force *)addr = value;
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| }
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| #endif
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| 
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| #ifndef __raw_writel
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| #define __raw_writel __raw_writel
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| static inline void __raw_writel(u32 value, volatile void __iomem *addr)
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| {
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| 	*(volatile u32 __force *)addr = value;
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef __raw_writeq
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| #define __raw_writeq __raw_writeq
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| static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
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| {
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| 	*(volatile u64 __force *)addr = value;
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| /*
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|  * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
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|  * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
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|  */
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| #ifndef readsb
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| #define readsb readsb
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| static inline void readsb(const volatile void __iomem *addr, void *buffer,
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| 			  unsigned int count)
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| {
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| 	if (count) {
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| 		u8 *buf = buffer;
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| 
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| 		do {
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| 			u8 x = __raw_readb(addr);
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| 			*buf++ = x;
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifndef readsw
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| #define readsw readsw
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| static inline void readsw(const volatile void __iomem *addr, void *buffer,
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| 			  unsigned int count)
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| {
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| 	if (count) {
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| 		u16 *buf = buffer;
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| 
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| 		do {
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| 			u16 x = __raw_readw(addr);
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| 			*buf++ = x;
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifndef readsl
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| #define readsl readsl
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| static inline void readsl(const volatile void __iomem *addr, void *buffer,
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| 			  unsigned int count)
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| {
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| 	if (count) {
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| 		u32 *buf = buffer;
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| 
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| 		do {
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| 			u32 x = __raw_readl(addr);
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| 			*buf++ = x;
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef readsq
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| #define readsq readsq
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| static inline void readsq(const volatile void __iomem *addr, void *buffer,
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| 			  unsigned int count)
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| {
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| 	if (count) {
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| 		u64 *buf = buffer;
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| 
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| 		do {
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| 			u64 x = __raw_readq(addr);
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| 			*buf++ = x;
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| #ifndef writesb
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| #define writesb writesb
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| static inline void writesb(volatile void __iomem *addr, const void *buffer,
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| 			   unsigned int count)
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| {
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| 	if (count) {
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| 		const u8 *buf = buffer;
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| 
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| 		do {
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| 			__raw_writeb(*buf++, addr);
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifndef writesw
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| #define writesw writesw
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| static inline void writesw(volatile void __iomem *addr, const void *buffer,
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| 			   unsigned int count)
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| {
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| 	if (count) {
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| 		const u16 *buf = buffer;
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| 
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| 		do {
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| 			__raw_writew(*buf++, addr);
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifndef writesl
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| #define writesl writesl
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| static inline void writesl(volatile void __iomem *addr, const void *buffer,
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| 			   unsigned int count)
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| {
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| 	if (count) {
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| 		const u32 *buf = buffer;
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| 
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| 		do {
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| 			__raw_writel(*buf++, addr);
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef writesq
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| #define writesq writesq
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| static inline void writesq(volatile void __iomem *addr, const void *buffer,
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| 			   unsigned int count)
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| {
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| 	if (count) {
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| 		const u64 *buf = buffer;
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| 
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| 		do {
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| 			__raw_writeq(*buf++, addr);
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| 		} while (--count);
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| 	}
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| #ifndef PCI_IOBASE
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| #define PCI_IOBASE ((void __iomem *)0)
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| #endif
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| 
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| /*
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|  * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
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|  * single I/O port multiple times.
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|  */
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| 
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| #ifndef insb
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| #define insb insb
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| static inline void insb(unsigned long addr, void *buffer, unsigned int count)
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| {
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| 	readsb(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef insw
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| #define insw insw
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| static inline void insw(unsigned long addr, void *buffer, unsigned int count)
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| {
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| 	readsw(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef insl
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| #define insl insl
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| static inline void insl(unsigned long addr, void *buffer, unsigned int count)
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| {
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| 	readsl(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef outsb
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| #define outsb outsb
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| static inline void outsb(unsigned long addr, const void *buffer,
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| 			 unsigned int count)
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| {
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| 	writesb(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef outsw
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| #define outsw outsw
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| static inline void outsw(unsigned long addr, const void *buffer,
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| 			 unsigned int count)
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| {
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| 	writesw(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef outsl
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| #define outsl outsl
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| static inline void outsl(unsigned long addr, const void *buffer,
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| 			 unsigned int count)
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| {
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| 	writesl(PCI_IOBASE + addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef ioread8_rep
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| #define ioread8_rep ioread8_rep
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| static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
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| 			       unsigned int count)
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| {
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| 	readsb(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef ioread16_rep
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| #define ioread16_rep ioread16_rep
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| static inline void ioread16_rep(const volatile void __iomem *addr,
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| 				void *buffer, unsigned int count)
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| {
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| 	readsw(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef ioread32_rep
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| #define ioread32_rep ioread32_rep
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| static inline void ioread32_rep(const volatile void __iomem *addr,
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| 				void *buffer, unsigned int count)
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| {
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| 	readsl(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef ioread64_rep
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| #define ioread64_rep ioread64_rep
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| static inline void ioread64_rep(const volatile void __iomem *addr,
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| 				void *buffer, unsigned int count)
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| {
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| 	readsq(addr, buffer, count);
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| #ifndef iowrite8_rep
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| #define iowrite8_rep iowrite8_rep
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| static inline void iowrite8_rep(volatile void __iomem *addr,
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| 				const void *buffer,
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| 				unsigned int count)
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| {
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| 	writesb(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef iowrite16_rep
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| #define iowrite16_rep iowrite16_rep
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| static inline void iowrite16_rep(volatile void __iomem *addr,
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| 				 const void *buffer,
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| 				 unsigned int count)
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| {
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| 	writesw(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifndef iowrite32_rep
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| #define iowrite32_rep iowrite32_rep
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| static inline void iowrite32_rep(volatile void __iomem *addr,
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| 				 const void *buffer,
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| 				 unsigned int count)
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| {
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| 	writesl(addr, buffer, count);
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| }
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| #endif
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| 
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| #ifdef CONFIG_64BIT
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| #ifndef iowrite64_rep
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| #define iowrite64_rep iowrite64_rep
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| static inline void iowrite64_rep(volatile void __iomem *addr,
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| 				 const void *buffer,
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| 				 unsigned int count)
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| {
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| 	writesq(addr, buffer, count);
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| }
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| #endif
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| #endif /* CONFIG_64BIT */
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| 
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| #endif /* !__ASSEMBLY__ */
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| #endif /* __ASM_GENERIC_IO_H__ */
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