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	PL310 is the L2$ controller from ARM used in many SoCs including the Cortex-A9 based OMAP4430 Add support for some of the key PL310 operations - Invalidate all - Invalidate range - Flush(clean & invalidate) all - Flush range Signed-off-by: Aneesh V <aneesh@ti.com>
		
			
				
	
	
		
			74 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2010
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|  * Texas Instruments, <www.ti.com>
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|  * Aneesh V <aneesh@ti.com>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| #ifndef _PL310_H_
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| #define _PL310_H_
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| 
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| #include <linux/types.h>
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| 
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| /* Register bit fields */
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| #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK	(1 << 16)
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| 
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| struct pl310_regs {
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| 	u32 pl310_cache_id;
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| 	u32 pl310_cache_type;
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| 	u32 pad1[62];
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| 	u32 pl310_ctrl;
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| 	u32 pl310_aux_ctrl;
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| 	u32 pl310_tag_latency_ctrl;
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| 	u32 pl310_data_latency_ctrl;
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| 	u32 pad2[60];
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| 	u32 pl310_event_cnt_ctrl;
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| 	u32 pl310_event_cnt1_cfg;
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| 	u32 pl310_event_cnt0_cfg;
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| 	u32 pl310_event_cnt1_val;
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| 	u32 pl310_event_cnt0_val;
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| 	u32 pl310_intr_mask;
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| 	u32 pl310_masked_intr_stat;
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| 	u32 pl310_raw_intr_stat;
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| 	u32 pl310_intr_clear;
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| 	u32 pad3[323];
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| 	u32 pl310_cache_sync;
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| 	u32 pad4[15];
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| 	u32 pl310_inv_line_pa;
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| 	u32 pad5[2];
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| 	u32 pl310_inv_way;
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| 	u32 pad6[12];
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| 	u32 pl310_clean_line_pa;
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| 	u32 pad7[1];
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| 	u32 pl310_clean_line_idx;
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| 	u32 pl310_clean_way;
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| 	u32 pad8[12];
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| 	u32 pl310_clean_inv_line_pa;
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| 	u32 pad9[1];
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| 	u32 pl310_clean_inv_line_idx;
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| 	u32 pl310_clean_inv_way;
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| };
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| 
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| void pl310_inval_all(void);
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| void pl310_clean_inval_all(void);
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| void pl310_inval_range(u32 start, u32 end);
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| void pl310_clean_inval_range(u32 start, u32 end);
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| 
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| #endif
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