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	Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.
Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
		
	
			
		
			
				
	
	
		
			126 lines
		
	
	
		
			3.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			126 lines
		
	
	
		
			3.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (c) 2017 Intel Corporation
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|  *
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|  * Partially based on acpi.c for other x86 platforms
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|  */
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| 
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| #include <common.h>
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| #include <cpu.h>
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| #include <dm.h>
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| #include <dm/uclass-internal.h>
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| #include <asm/acpi_table.h>
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| #include <asm/ioapic.h>
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| #include <asm/mpspec.h>
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| #include <asm/tables.h>
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| #include <asm/arch/global_nvs.h>
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| #include <asm/arch/iomap.h>
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| 
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| void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
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| 		      void *dsdt)
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| {
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| 	struct acpi_table_header *header = &(fadt->header);
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| 
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| 	memset((void *)fadt, 0, sizeof(struct acpi_fadt));
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| 
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| 	acpi_fill_header(header, "FACP");
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| 	header->length = sizeof(struct acpi_fadt);
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| 	header->revision = 6;
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| 
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| 	fadt->firmware_ctrl = (u32)facs;
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| 	fadt->dsdt = (u32)dsdt;
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| 	fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED;
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| 
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| 	fadt->iapc_boot_arch = ACPI_FADT_VGA_NOT_PRESENT |
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| 			       ACPI_FADT_NO_PCIE_ASPM_CONTROL;
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| 	fadt->flags =
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| 		ACPI_FADT_WBINVD |
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| 		ACPI_FADT_POWER_BUTTON | ACPI_FADT_SLEEP_BUTTON |
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| 		ACPI_FADT_SEALED_CASE | ACPI_FADT_HEADLESS |
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| 		ACPI_FADT_HW_REDUCED_ACPI;
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| 
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| 	fadt->minor_revision = 2;
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| 
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| 	fadt->x_firmware_ctl_l = (u32)facs;
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| 	fadt->x_firmware_ctl_h = 0;
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| 	fadt->x_dsdt_l = (u32)dsdt;
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| 	fadt->x_dsdt_h = 0;
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| 
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| 	header->checksum = table_compute_checksum(fadt, header->length);
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| }
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| 
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| u32 acpi_fill_madt(u32 current)
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| {
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| 	current += acpi_create_madt_lapics(current);
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| 
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| 	current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
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| 			io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
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| 
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| 	return current;
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| }
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| 
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| u32 acpi_fill_mcfg(u32 current)
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| {
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| 	/* TODO: Derive parameters from SFI MCFG table */
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| 	current += acpi_create_mcfg_mmconfig
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| 		((struct acpi_mcfg_mmconfig *)current,
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| 		MCFG_BASE_ADDRESS, 0x0, 0x0, 0x0);
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| 
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| 	return current;
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| }
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| 
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| static u32 acpi_fill_csrt_dma(struct acpi_csrt_group *grp)
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| {
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| 	struct acpi_csrt_shared_info *si = (struct acpi_csrt_shared_info *)&grp[1];
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| 
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| 	/* Fill the Resource Group with Shared Information attached */
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| 	memset(grp, 0, sizeof(*grp));
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| 	grp->shared_info_length = sizeof(struct acpi_csrt_shared_info);
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| 	grp->length = sizeof(struct acpi_csrt_group) + grp->shared_info_length;
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| 	/* TODO: All values below should come from U-Boot DT somehow */
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| 	sprintf((char *)&grp->vendor_id, "%04X", 0x8086);
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| 	grp->device_id = 0x11a2;
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| 
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| 	/* Fill the Resource Group Shared Information */
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| 	memset(si, 0, sizeof(*si));
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| 	si->major_version = 1;
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| 	si->minor_version = 0;
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| 	/* TODO: All values below should come from U-Boot DT somehow */
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| 	si->mmio_base_low = 0xff192000;
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| 	si->mmio_base_high = 0;
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| 	si->gsi_interrupt = 32;
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| 	si->interrupt_polarity = 1;
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| 	si->interrupt_mode = 0;
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| 	si->num_channels = 8;
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| 	si->dma_address_width = 32;
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| 	si->base_request_line = 0;
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| 	si->num_handshake_signals = 16;
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| 	si->max_block_size = 0x1ffff;
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| 
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| 	return grp->length;
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| }
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| 
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| u32 acpi_fill_csrt(u32 current)
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| {
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| 	current += acpi_fill_csrt_dma((struct acpi_csrt_group *)current);
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| 
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| 	return current;
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| }
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| 
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| void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
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| {
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| 	struct udevice *dev;
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| 	int ret;
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| 
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| 	/* at least we have one processor */
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| 	gnvs->pcnt = 1;
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| 
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| 	/* override the processor count with actual number */
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| 	ret = uclass_find_first_device(UCLASS_CPU, &dev);
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| 	if (ret == 0 && dev != NULL) {
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| 		ret = cpu_get_count(dev);
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| 		if (ret > 0)
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| 			gnvs->pcnt = ret;
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| 	}
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| }
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