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48c6f9777c
The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW7905 Baseboard contains the following: - GPS - microSD - off-board I/O connector with I2C, SPI, GPIO - EERPOM - PCIe clock generator - 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0 - 1x half-length miniPCIe socket with USB2.0 and USB3.0 - USB 3.0 HUB - USB Type-C with USB PD Sink capability and peripheral support - USB Type-C with USB 3.0 host support Signed-off-by: Tim Harvey <tharvey@gateworks.com>
24 lines
732 B
C
24 lines
732 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 Gateworks Corporation
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*/
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#ifndef __LPDDR4_TIMING_H__
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#define __LPDDR4_TIMING_H__
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#ifdef CONFIG_IMX8MM
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extern struct dram_timing_info dram_timing_512mb;
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extern struct dram_timing_info dram_timing_1gb;
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extern struct dram_timing_info dram_timing_2gb;
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extern struct dram_timing_info dram_timing_4gb;
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#elif CONFIG_IMX8MN
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extern struct dram_timing_info dram_timing_1gb_single_die;
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extern struct dram_timing_info dram_timing_2gb_single_die;
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extern struct dram_timing_info dram_timing_2gb_dual_die;
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#elif CONFIG_IMX8MP
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extern struct dram_timing_info dram_timing_1gb_single_die;
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extern struct dram_timing_info dram_timing_4gb_dual_die;
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#endif
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#endif /* __LPDDR4_TIMING_H__ */
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