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f33b9bd398
This patch change the per_clocks_enable() function used in OMAP3
code to enable peripherals clocks. Only required clock should be
activated. So if the board use the uart(x) as a console we need
to activate it. The Board's config should include define to enable
every subsystem that the board use. For a complete list
of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
should be checked.
Right now the bootloader can enable and disable clocks for:
uart(x) using CONFIG_SYS_NS16550
gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.
Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
are not supported by any define.
Their activation need to included in the per_clocks_enable if the
peripheral is included. Not booting board should enable the peripheral
clock connected to their driver
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* (C) Copyright 2006-2008
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CLOCKS_H_
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#define _CLOCKS_H_
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#define LDELAY 12000000
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#define S12M 12000000
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#define S13M 13000000
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#define S19_2M 19200000
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#define S24M 24000000
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#define S26M 26000000
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#define S38_4M 38400000
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#define FCK_IVA2_ON 0x00000001
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#define FCK_CORE1_ON 0x03fffe29
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#define ICK_CORE1_ON 0x3ffffffb
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#define ICK_CORE2_ON 0x0000001f
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#define FCK_WKUP_ON 0x000000e9
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#define ICK_WKUP_ON 0x0000003f
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#define FCK_DSS_ON 0x00000005
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#define ICK_DSS_ON 0x00000001
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#define FCK_CAM_ON 0x00000001
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#define ICK_CAM_ON 0x00000001
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/* Used to index into DPLL parameter tables */
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typedef struct {
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unsigned int m;
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unsigned int n;
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unsigned int fsel;
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unsigned int m2;
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} dpll_param;
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struct dpll_per_36x_param {
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unsigned int sys_clk;
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unsigned int m;
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unsigned int n;
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unsigned int m2;
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unsigned int m3;
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unsigned int m4;
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unsigned int m5;
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unsigned int m6;
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unsigned int m2div;
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};
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/* Following functions are exported from lowlevel_init.S */
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extern dpll_param *get_mpu_dpll_param(void);
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extern dpll_param *get_iva_dpll_param(void);
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extern dpll_param *get_core_dpll_param(void);
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extern dpll_param *get_per_dpll_param(void);
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extern dpll_param *get_per2_dpll_param(void);
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extern dpll_param *get_36x_mpu_dpll_param(void);
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extern dpll_param *get_36x_iva_dpll_param(void);
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extern dpll_param *get_36x_core_dpll_param(void);
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extern dpll_param *get_36x_per_dpll_param(void);
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extern dpll_param *get_36x_per2_dpll_param(void);
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#endif
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