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	Add NAND to CP master device tree. Add armada-7040-db-nand device tree for the board configured with NAND boot device. Add comment about boot device ID to armada-7040-db DTS. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
		
			
				
	
	
		
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2017 Marvell Technology Group Ltd.
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|  *
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|  * This file is dual-licensed: you can use it either under the terms
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|  * of the GPLv2 or the X11 license, at your option. Note that this dual
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|  * licensing only applies to this file, and not this project as a
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|  * whole.
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|  *
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|  *  a) This library is free software; you can redistribute it and/or
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|  *     modify it under the terms of the GNU General Public License as
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|  *     published by the Free Software Foundation; either version 2 of the
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|  *     License, or (at your option) any later version.
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|  *
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|  *     This library is distributed in the hope that it will be useful,
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|  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *     GNU General Public License for more details.
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|  *
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|  * Or, alternatively,
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|  *
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|  *  b) Permission is hereby granted, free of charge, to any person
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|  *     obtaining a copy of this software and associated documentation
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|  *     files (the "Software"), to deal in the Software without
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|  *     restriction, including without limitation the rights to use,
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|  *     copy, modify, merge, publish, distribute, sublicense, and/or
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|  *     sell copies of the Software, and to permit persons to whom the
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|  *     Software is furnished to do so, subject to the following
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|  *     conditions:
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|  *
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|  *     The above copyright notice and this permission notice shall be
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|  *     included in all copies or substantial portions of the Software.
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|  *
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|  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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|  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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|  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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|  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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|  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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|  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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|  *     OTHER DEALINGS IN THE SOFTWARE.
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|  */
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| 
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| /*
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|  * Device Tree file for Marvell Armada 7040 Development board platform
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|  * Boot device: NAND, 0xE (SW3)
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|  */
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| 
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| #include "armada-7040.dtsi"
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| 
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| / {
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| 	model = "Marvell Armada 7040 DB board with NAND";
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| 	compatible = "marvell,armada7040-db-nand", "marvell,armada7040-db",
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| 		     "marvell,armada7040", "marvell,armada-ap806-quad",
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| 		     "marvell,armada-ap806";
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	aliases {
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| 		i2c0 = &cpm_i2c0;
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| 		spi0 = &cpm_spi1;
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| 	};
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| 
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| 	memory@00000000 {
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| 		device_type = "memory";
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| 		reg = <0x0 0x0 0x0 0x80000000>;
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| 	};
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| };
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| 
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| &ap_pinctl {
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| 	   /* MPP Bus:
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| 	    * SDIO  [0-5]
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| 	    * UART0 [11,19]
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| 	    */
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| 		  /* 0   1   2   3   4   5   6   7   8   9 */
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| 	pin-func = < 0x1 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0
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| 		     0x0 0x3 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3 >;
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| };
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| 
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| &uart0 {
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| 	status = "okay";
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| };
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| 
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| 
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| &cpm_pcie2 {
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| 	status = "okay";
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| };
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| 
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| &cpm_i2c0 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&cpm_i2c0_pins>;
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| 	status = "okay";
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| 	clock-frequency = <100000>;
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| };
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| 
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| &cpm_pinctl {
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| 		/* MPP Bus:
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| 		 * AUDIO   [0-5]
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|                  * GBE     [6-11]
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| 		 * SS_PWDN [12]
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| 		 * NF_RBn  [13]
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|                  * GPIO    [14]
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| 		 * DEV_BUS [15-27]
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| 		 * SATA1   [28]
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| 		 * UART0   [29-30]
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| 		 * MSS_VTT_EN [31]
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| 		 * SMI	   [32,34]
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| 		 * XSMI    [35-36]
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| 		 * I2C	   [37-38]
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| 		 * RGMII1  [44-55]
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| 		 * SD	   [56-61]
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| 		 * GPIO    [62]
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| 		 */
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| 		 /*   0   1   2   3   4   5   6   7   8   9 */
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| 	 pin-func = < 0x2 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3
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| 		      0x3 0x3 0x0 0x2 0x0 0x1 0x1 0x1 0x1 0x1
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| 		      0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x9 0xa
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| 		      0xa 0x0 0x7 0x0 0x7 0x7 0x7 0x2 0x2 0x0
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| 		      0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1
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| 		      0x1 0x1 0x1 0x1 0x1 0x1 0xe 0xe 0xe 0xe
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| 		      0xe 0xe 0x0>;
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| };
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| 
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| &cpm_spi1 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&cpm_spi0_pins>;
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| 	status = "disabled";
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| 
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| 	spi-flash@0 {
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| 		#address-cells = <0x1>;
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| 		#size-cells = <0x1>;
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| 		compatible = "jedec,spi-nor";
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| 		reg = <0x0>;
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| 		spi-max-frequency = <20000000>;
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| 
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| 		partitions {
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| 			compatible = "fixed-partitions";
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| 			#address-cells = <1>;
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| 			#size-cells = <1>;
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| 
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| 			partition@0 {
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| 				label = "U-Boot";
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| 				reg = <0x0 0x200000>;
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| 			};
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| 
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| 			partition@400000 {
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| 				label = "Filesystem";
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| 				reg = <0x200000 0xe00000>;
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &cpm_sata0 {
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| 	status = "okay";
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| };
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| 
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| &cpm_usb3_0 {
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| 	status = "okay";
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| };
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| 
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| &cpm_usb3_1 {
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| 	status = "okay";
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| };
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| 
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| &cpm_comphy {
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| 	phy0 {
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| 		phy-type = <PHY_TYPE_SGMII2>;
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| 		phy-speed = <PHY_SPEED_3_125G>;
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| 	};
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| 
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| 	phy1 {
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| 		phy-type = <PHY_TYPE_USB3_HOST0>;
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| 		phy-speed = <PHY_SPEED_5G>;
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| 	};
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| 
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| 	phy2 {
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| 		phy-type = <PHY_TYPE_SGMII0>;
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| 		phy-speed = <PHY_SPEED_1_25G>;
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| 	};
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| 
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| 	phy3 {
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| 		phy-type = <PHY_TYPE_SATA1>;
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| 		phy-speed = <PHY_SPEED_5G>;
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| 	};
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| 
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| 	phy4 {
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| 		phy-type = <PHY_TYPE_USB3_HOST1>;
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| 		phy-speed = <PHY_SPEED_5G>;
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| 	};
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| 
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| 	phy5 {
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| 		phy-type = <PHY_TYPE_PEX2>;
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| 		phy-speed = <PHY_SPEED_5G>;
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| 	};
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| };
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| 
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| &cpm_nand {
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| 	status = "okay";
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| };
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| 
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| &cpm_utmi0 {
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| 	status = "okay";
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| };
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| 
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| &cpm_utmi1 {
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| 	status = "okay";
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| };
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| 
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| &ap_sdhci0 {
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| 	status = "okay";
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| 	bus-width = <4>;
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| 	no-1-8-v;
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| 	non-removable;
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| };
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| 
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| &cpm_sdhci0 {
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| 	status = "okay";
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| 	bus-width = <4>;
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| 	no-1-8-v;
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| 	non-removable;
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| };
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