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52f69f818c
This change adds initial support for NXP LPC32x0 SoC series. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Marek Vasut <marek.vasut@gmail.com>
53 lines
1.6 KiB
C
53 lines
1.6 KiB
C
/*
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* Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <common.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/uart.h>
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#include <asm/io.h>
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static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
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static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
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void lpc32xx_uart_init(unsigned int uart_id)
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{
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if (uart_id < 1 || uart_id > 7)
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return;
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/* Disable loopback mode, if it is set by S1L bootloader */
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clrbits_le32(&ctrl->loop,
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UART_LOOPBACK(CONFIG_SYS_LPC32XX_UART));
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if (uart_id < 3 || uart_id > 6)
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return;
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/* Enable UART system clock */
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setbits_le32(&clk->uartclk_ctrl, CLK_UART(uart_id));
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/* Set UART into autoclock mode */
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clrsetbits_le32(&ctrl->clkmode,
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UART_CLKMODE_MASK(uart_id),
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UART_CLKMODE_AUTO(uart_id));
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/* Bypass pre-divider of UART clock */
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writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
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&clk->u3clk + (uart_id - 3));
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}
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