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ee729afde3
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Michal Simek <monstr@monstr.eu>
38 lines
1.3 KiB
C
38 lines
1.3 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MICROBLAZE_CACHE_H__
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#define __MICROBLAZE_CACHE_H__
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/*
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* The microblaze can have either a 4 or 16 byte cacheline depending on whether
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* you are using OPB(4) or CacheLink(16). If the board config has not specified
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* a cacheline size we assume the larger value of 16 bytes for DMA buffer
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* alignment.
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*/
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#ifdef CONFIG_SYS_CACHELINE_SIZE
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#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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#else
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#define ARCH_DMA_MINALIGN 16
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#endif
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#endif /* __MICROBLAZE_CACHE_H__ */
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