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https://github.com/smaeul/u-boot.git
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540a2bcec1
Add a tool to update or insert an Octeon specific header into the U-Boot image. This is needed e.g. for booting via SPI NOR, eMMC and NAND. While working on this, move enum cvmx_board_types_enum and cvmx_board_type_to_string() to cvmx-bootloader.h and remove the unreferenced (unsupported) board definition. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
129 lines
3.4 KiB
C
129 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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/*
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* Header file containing the ABI with the bootloader.
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*/
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#ifndef __CVMX_BOOTINFO_H__
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#define __CVMX_BOOTINFO_H__
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#include "cvmx-coremask.h"
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/*
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* Current major and minor versions of the CVMX bootinfo block that is
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* passed from the bootloader to the application. This is versioned
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* so that applications can properly handle multiple bootloader
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* versions.
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*/
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#define CVMX_BOOTINFO_MAJ_VER 1
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#define CVMX_BOOTINFO_MIN_VER 4
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#if (CVMX_BOOTINFO_MAJ_VER == 1)
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#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20
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/*
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* This structure is populated by the bootloader. For binary
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* compatibility the only changes that should be made are
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* adding members to the end of the structure, and the minor
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* version should be incremented at that time.
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* If an incompatible change is made, the major version
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* must be incremented, and the minor version should be reset
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* to 0.
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*/
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struct cvmx_bootinfo {
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u32 major_version;
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u32 minor_version;
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u64 stack_top;
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u64 heap_base;
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u64 heap_end;
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u64 desc_vaddr;
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u32 exception_base_addr;
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u32 stack_size;
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u32 flags;
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u32 core_mask;
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/* DRAM size in megabytes */
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u32 dram_size;
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/* physical address of free memory descriptor block*/
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u32 phy_mem_desc_addr;
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/* used to pass flags from app to debugger */
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u32 debugger_flags_base_addr;
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/* CPU clock speed, in hz */
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u32 eclock_hz;
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/* DRAM clock speed, in hz */
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u32 dclock_hz;
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u32 reserved0;
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u16 board_type;
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u8 board_rev_major;
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u8 board_rev_minor;
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u16 reserved1;
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u8 reserved2;
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u8 reserved3;
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char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
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u8 mac_addr_base[6];
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u8 mac_addr_count;
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#if (CVMX_BOOTINFO_MIN_VER >= 1)
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/*
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* Several boards support compact flash on the Octeon boot
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* bus. The CF memory spaces may be mapped to different
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* addresses on different boards. These are the physical
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* addresses, so care must be taken to use the correct
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* XKPHYS/KSEG0 addressing depending on the application's
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* ABI. These values will be 0 if CF is not present.
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*/
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u64 compact_flash_common_base_addr;
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u64 compact_flash_attribute_base_addr;
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/*
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* Base address of the LED display (as on EBT3000 board)
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* This will be 0 if LED display not present.
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*/
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u64 led_display_base_addr;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 2)
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/* DFA reference clock in hz (if applicable)*/
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u32 dfa_ref_clock_hz;
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/*
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* flags indicating various configuration options. These
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* flags supercede the 'flags' variable and should be used
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* instead if available.
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*/
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u32 config_flags;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 3)
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/*
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* Address of the OF Flattened Device Tree structure
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* describing the board.
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*/
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u64 fdt_addr;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 4)
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/*
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* Coremask used for processors with more than 32 cores
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* or with OCI. This replaces core_mask.
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*/
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struct cvmx_coremask ext_core_mask;
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#endif
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};
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#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0)
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#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1)
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#define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2)
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#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3)
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/*
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* This flag is set if the TLB mappings are not contained in the
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* 0x10000000 - 0x20000000 boot bus region.
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*/
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#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4)
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#define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5)
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#endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */
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#endif /* __CVMX_BOOTINFO_H__ */
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