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				https://github.com/smaeul/u-boot.git
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	Device tree alignment with Linux kernel v6.6.rc1. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
		
			
				
	
	
		
			101 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			101 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
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| /*
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|  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
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|  * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
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|  */
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| 
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| #ifndef _DT_BINDINGS_STM32MP13_RESET_H_
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| #define _DT_BINDINGS_STM32MP13_RESET_H_
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| 
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| #define TIM2_R		13568
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| #define TIM3_R		13569
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| #define TIM4_R		13570
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| #define TIM5_R		13571
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| #define TIM6_R		13572
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| #define TIM7_R		13573
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| #define LPTIM1_R	13577
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| #define SPI2_R		13579
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| #define SPI3_R		13580
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| #define USART3_R	13583
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| #define UART4_R		13584
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| #define UART5_R		13585
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| #define UART7_R		13586
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| #define UART8_R		13587
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| #define I2C1_R		13589
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| #define I2C2_R		13590
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| #define SPDIF_R		13594
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| #define TIM1_R		13632
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| #define TIM8_R		13633
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| #define SPI1_R		13640
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| #define USART6_R	13645
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| #define SAI1_R		13648
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| #define SAI2_R		13649
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| #define DFSDM_R		13652
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| #define FDCAN_R		13656
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| #define LPTIM2_R	13696
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| #define LPTIM3_R	13697
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| #define LPTIM4_R	13698
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| #define LPTIM5_R	13699
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| #define SYSCFG_R	13707
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| #define VREF_R		13709
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| #define DTS_R		13712
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| #define PMBCTRL_R	13713
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| #define LTDC_R		13760
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| #define DCMIPP_R	13761
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| #define DDRPERFM_R	13768
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| #define USBPHY_R	13776
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| #define STGEN_R		13844
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| #define USART1_R	13888
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| #define USART2_R	13889
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| #define SPI4_R		13890
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| #define SPI5_R		13891
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| #define I2C3_R		13892
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| #define I2C4_R		13893
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| #define I2C5_R		13894
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| #define TIM12_R		13895
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| #define TIM13_R		13896
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| #define TIM14_R		13897
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| #define TIM15_R		13898
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| #define TIM16_R		13899
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| #define TIM17_R		13900
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| #define DMA1_R		13952
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| #define DMA2_R		13953
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| #define DMAMUX1_R	13954
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| #define DMA3_R		13955
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| #define DMAMUX2_R	13956
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| #define ADC1_R		13957
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| #define ADC2_R		13958
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| #define USBO_R		13960
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| #define GPIOA_R		14080
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| #define GPIOB_R		14081
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| #define GPIOC_R		14082
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| #define GPIOD_R		14083
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| #define GPIOE_R		14084
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| #define GPIOF_R		14085
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| #define GPIOG_R		14086
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| #define GPIOH_R		14087
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| #define GPIOI_R		14088
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| #define TSC_R		14095
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| #define PKA_R		14146
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| #define SAES_R		14147
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| #define CRYP1_R		14148
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| #define HASH1_R		14149
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| #define RNG1_R		14150
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| #define AXIMC_R		14160
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| #define MDMA_R		14208
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| #define MCE_R		14209
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| #define ETH1MAC_R	14218
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| #define FMC_R		14220
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| #define QSPI_R		14222
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| #define SDMMC1_R	14224
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| #define SDMMC2_R	14225
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| #define CRC1_R		14228
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| #define USBH_R		14232
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| #define ETH2MAC_R	14238
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| 
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| /* SCMI reset domain identifiers */
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| #define RST_SCMI_LTDC		0
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| #define RST_SCMI_MDMA		1
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| 
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| #endif /* _DT_BINDINGS_STM32MP13_RESET_H_ */
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