York Sun 53d76829d5 armv7: ls1021a: Move DDR config options to Kconfig ...

Move DDR3, DDR4 and related config options to Kconfig and clean up
existing uses.

Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

2016-10-06 09:59:11 -07:00

..

clock.c

driver/ifc: Add 64KB page support

2015-04-23 16:46:50 -07:00

cpu.c

arm: ls102x: add get_svr and IS_SVR_REV helper

2015-12-13 18:27:28 -08:00

fdt.c

arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()

2016-01-28 12:23:22 -06:00

fsl_epu.c

nxp: ls102xa: add EPU Finite State Machine

2016-09-14 14:07:51 -07:00

fsl_epu.h

nxp: ls102xa: add EPU Finite State Machine

2016-09-14 14:07:51 -07:00

fsl_ls1_serdes.c

Merge git://git.denx.de/u-boot-fsl-qoriq

2016-09-26 17:10:56 -04:00

fsl_ls1_serdes.h

arm: ls102xa: Add Freescale LS102xA SoC support

2014-09-08 10:30:32 -07:00

Kconfig

armv7: ls1021a: Move DDR config options to Kconfig

2016-10-06 09:59:11 -07:00

ls102xa_psci.c

armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR

2016-09-26 08:53:07 -07:00

ls102xa_sata.c

arm: ls1021a: Adjust sata register default values

2016-01-25 08:24:15 -08:00

ls102xa_serdes.c

arm: ls102xa: Add Freescale LS102xA SoC support

2014-09-08 10:30:32 -07:00

Makefile

nxp: ls102xa: add LS1 PSCI system suspend

2016-09-14 14:08:04 -07:00

psci.S

nxp: ls102xa: add LS1 PSCI system suspend

2016-09-14 14:08:04 -07:00

soc.c

armv7: LS1021a: enable i-cache in start.S

2016-10-06 09:55:08 -07:00

spl.c

common: Pass the boot device into spl_boot_mode()

2016-06-26 20:17:22 +02:00

timer.c

arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit

2015-11-30 08:53:01 -08:00