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	c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable() to board_init_r(). This enables d-cache for all ARM boards. As a result some of the arm boards that are not cache-ready are broken. Revert this change and allow platform code to take the decision on d-cache enabling. Also add some documentation for cache usage in ARM. Signed-off-by: Aneesh V <aneesh@ti.com>
		
			
				
	
	
		
			68 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			68 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2002
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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/* for now: just dummy functions to satisfy the linker */
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#include <common.h>
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void  __flush_cache(unsigned long start, unsigned long size)
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{
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#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
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	void arm1136_cache_flush(void);
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	arm1136_cache_flush();
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#endif
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#ifdef CONFIG_ARM926EJS
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	/* test and clean, page 2-23 of arm926ejs manual */
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	asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
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	/* disable write buffer as well (page 2-22) */
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	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
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#endif
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	return;
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}
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void  flush_cache(unsigned long start, unsigned long size)
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	__attribute__((weak, alias("__flush_cache")));
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/*
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 * Default implementation:
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 * do a range flush for the entire range
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 */
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void	__flush_dcache_all(void)
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{
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	flush_cache(0, ~0);
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}
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void	flush_dcache_all(void)
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	__attribute__((weak, alias("__flush_dcache_all")));
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/*
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 * Default implementation of enable_caches()
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 * Real implementation should be in platform code
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 */
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void __enable_caches(void)
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{
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	puts("WARNING: Caches not enabled\n");
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}
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void enable_caches(void)
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	__attribute__((weak, alias("__enable_caches")));
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