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a952c3a454
Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson <seanga2@gmail.com>
61 lines
1.5 KiB
C
61 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
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*/
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#ifndef CLOCK_K210_SYSCTL_H
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#define CLOCK_K210_SYSCTL_H
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/*
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* Arbitrary identifiers for clocks.
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*/
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#define K210_CLK_NONE 0
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#define K210_CLK_IN0_H 1
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#define K210_CLK_PLL0_H 2
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#define K210_CLK_PLL0 3
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#define K210_CLK_PLL1 4
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#define K210_CLK_PLL2 5
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#define K210_CLK_PLL2_H 6
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#define K210_CLK_CPU 7
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#define K210_CLK_SRAM0 8
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#define K210_CLK_SRAM1 9
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#define K210_CLK_APB0 10
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#define K210_CLK_APB1 11
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#define K210_CLK_APB2 12
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#define K210_CLK_ROM 13
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#define K210_CLK_DMA 14
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#define K210_CLK_AI 15
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#define K210_CLK_DVP 16
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#define K210_CLK_FFT 17
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#define K210_CLK_GPIO 18
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#define K210_CLK_SPI0 19
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#define K210_CLK_SPI1 20
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#define K210_CLK_SPI2 21
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#define K210_CLK_SPI3 22
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#define K210_CLK_I2S0 23
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#define K210_CLK_I2S1 24
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#define K210_CLK_I2S2 25
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#define K210_CLK_I2S0_M 26
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#define K210_CLK_I2S1_M 27
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#define K210_CLK_I2S2_M 28
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#define K210_CLK_I2C0 29
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#define K210_CLK_I2C1 30
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#define K210_CLK_I2C2 31
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#define K210_CLK_UART1 32
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#define K210_CLK_UART2 33
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#define K210_CLK_UART3 34
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#define K210_CLK_AES 35
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#define K210_CLK_FPIOA 36
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#define K210_CLK_TIMER0 37
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#define K210_CLK_TIMER1 38
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#define K210_CLK_TIMER2 39
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#define K210_CLK_WDT0 40
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#define K210_CLK_WDT1 41
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#define K210_CLK_SHA 42
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#define K210_CLK_OTP 43
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#define K210_CLK_RTC 44
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#define K210_CLK_ACLK 45
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#define K210_CLK_CLINT 46
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#endif /* CLOCK_K210_SYSCTL_H */
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