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03de305ec4
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
180 lines
4.0 KiB
C
180 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Ilko Iliev <iliev@ronetix.at>
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* Asen Dimov <dimov@ronetix.at>
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* Ronetix GmbH <www.ronetix.at>
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*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*/
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#include <config.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <linux/sizes.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/at91_matrix.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/clk.h>
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
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#include <net.h>
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#endif
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#include <netdev.h>
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#include <asm/mach-types.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscelaneous platform dependent initialisations
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*/
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#ifdef CONFIG_CMD_NAND
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static void pm9g45_nand_hw_init(void)
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{
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unsigned long csa;
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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/* Enable CS3 */
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csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A;
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writel(csa, &matrix->ccr[6]);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(3),
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&smc->cs[3].mode);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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#ifdef CFG_SYS_NAND_READY_PIN
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/* Configure RDY/BSY */
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gpio_request(CFG_SYS_NAND_READY_PIN, "NAND RDY/BSY");
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gpio_direction_input(CFG_SYS_NAND_READY_PIN);
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#endif
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/* Enable NandFlash */
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gpio_request(CFG_SYS_NAND_ENABLE_PIN, "NAND enable");
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gpio_direction_output(CFG_SYS_NAND_ENABLE_PIN, 1);
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}
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#endif
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#ifdef CONFIG_MACB
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static void pm9g45_macb_hw_init(void)
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{
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/*
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* PD2 enables the 50MHz oscillator for Ethernet PHY
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* 1 - enable
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* 0 - disable
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*/
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at91_set_pio_output(AT91_PIO_PORTD, 2, 1);
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at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */
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at91_periph_clk_enable(ATMEL_ID_EMAC);
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/*
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* Disable pull-up on:
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* RXDV (PA15) => PHY normal mode (not Test mode)
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* ERX0 (PA12) => PHY ADDR0
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* ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
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/* Re-enable pull-up */
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
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at91_macb_hw_init();
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}
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#endif
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int board_early_init_f(void)
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{
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_periph_clk_enable(ATMEL_ID_PIOB);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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at91_periph_clk_enable(ATMEL_ID_PIODE);
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at91_seriald_hw_init();
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return 0;
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}
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int board_init(void)
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{
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/* arch number of AT91SAM9M10G45EK-Board */
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gd->bd->bi_arch_number = MACH_TYPE_PM9G45;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_CMD_NAND
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pm9g45_nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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pm9g45_macb_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
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CFG_SYS_SDRAM_SIZE);
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = CFG_SYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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#ifdef CONFIG_MACB
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/*
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* Initialize ethernet HW addr prior to starting Linux,
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* needed for nfsroot
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*/
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eth_init();
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#endif
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}
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#endif
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int board_eth_init(struct bd_info *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
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#endif
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return rc;
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}
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