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47 lines
1.1 KiB
YAML
47 lines
1.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MIPS CPU Interrupt Controller
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description: >
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On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
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IRQs from a devicetree file and create a irq_domain for IRQ controller.
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With the irq_domain in place we can describe how the 8 IRQs are wired to the
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platforms internal interrupt controller cascade.
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maintainers:
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- Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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properties:
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compatible:
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const: mti,cpu-interrupt-controller
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'#interrupt-cells':
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const: 1
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'#address-cells':
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const: 0
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interrupt-controller: true
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additionalProperties: false
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required:
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- compatible
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- '#interrupt-cells'
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- '#address-cells'
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- interrupt-controller
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examples:
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- |
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interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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