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eb40d05fcc
Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
150 lines
3.7 KiB
C
150 lines
3.7 KiB
C
/*
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* Miscelaneous DaVinci functions.
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
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* Copyright (C) 2004 Texas Instruments.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <net.h>
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/davinci_misc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SPL_BUILD
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size(
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(void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_MAX_RAM_BANK_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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#endif
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#ifdef CONFIG_DRIVER_TI_EMAC
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/* Read ethernet MAC address from EEPROM for DVEVM compatible boards.
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* Returns 1 if found, 0 otherwise.
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*/
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int dvevm_read_mac_address(uint8_t *buf)
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{
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#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
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/* Read MAC address. */
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if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uint8_t *) &buf[0], 6))
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goto i2cerr;
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/* Check that MAC address is valid. */
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if (!is_valid_ether_addr(buf))
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goto err;
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return 1; /* Found */
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i2cerr:
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printf("Read from EEPROM @ 0x%02x failed\n", CONFIG_SYS_I2C_EEPROM_ADDR);
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err:
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#endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
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return 0;
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}
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/*
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* Set the mii mode as MII or RMII
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*/
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#if defined(CONFIG_SOC_DA8XX)
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void davinci_emac_mii_mode_sel(int mode_sel)
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{
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int val;
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val = readl(&davinci_syscfg_regs->cfgchip3);
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if (mode_sel == 0)
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val &= ~(1 << 8);
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else
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val |= (1 << 8);
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writel(val, &davinci_syscfg_regs->cfgchip3);
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}
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#endif
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/*
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* If there is no MAC address in the environment, then it will be initialized
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* (silently) from the value in the EEPROM.
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*/
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void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
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{
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uint8_t env_enetaddr[6];
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eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
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if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) {
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/* There is no MAC address in the environment, so we initialize
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* it from the value in the EEPROM. */
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debug("### Setting environment from EEPROM MAC address = "
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"\"%pM\"\n",
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env_enetaddr);
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eth_setenv_enetaddr("ethaddr", rom_enetaddr);
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}
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}
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#endif /* CONFIG_DRIVER_TI_EMAC */
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#if defined(CONFIG_SOC_DA8XX)
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#ifndef CONFIG_USE_IRQ
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void irq_init(void)
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{
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/*
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* Mask all IRQs by clearing the global enable and setting
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* the enable clear for all the 90 interrupts.
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*/
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writel(0, &davinci_aintc_regs->ger);
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writel(0, &davinci_aintc_regs->hier);
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writel(0xffffffff, &davinci_aintc_regs->ecr1);
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writel(0xffffffff, &davinci_aintc_regs->ecr2);
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writel(0xffffffff, &davinci_aintc_regs->ecr3);
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}
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#endif
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/*
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* Enable PSC for various peripherals.
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*/
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int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
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const int n_items)
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{
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int i;
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for (i = 0; i < n_items; i++)
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lpsc_on(item[i].lpsc_no);
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return 0;
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}
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#endif
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