mirror of
https://github.com/smaeul/u-boot.git
synced 2025-11-04 05:50:17 +00:00
b615267633
The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
45 lines
1.4 KiB
C
45 lines
1.4 KiB
C
/*
|
|
* (C) Copyright 2013
|
|
* NVIDIA Corporation <www.nvidia.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/* AS3722-PMIC-specific early init regs */
|
|
|
|
#define AS3722_I2C_ADDR 0x80
|
|
|
|
#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */
|
|
#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */
|
|
#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */
|
|
#define AS3722_SDCONTROL_REG 0x4D
|
|
|
|
#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */
|
|
#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */
|
|
#define AS3722_LDCONTROL_REG 0x4E
|
|
|
|
#if defined(CONFIG_TARGET_VENICE2)
|
|
#define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG)
|
|
#else /* TK1 or Nyan-Big */
|
|
#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG)
|
|
#endif
|
|
#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG)
|
|
|
|
#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM)
|
|
#define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG)
|
|
#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG)
|
|
#endif
|
|
|
|
#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG)
|
|
#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG)
|
|
|
|
#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG)
|
|
#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG)
|
|
|
|
#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG)
|
|
#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG)
|
|
|
|
#define I2C_SEND_2_BYTES 0x0A02
|
|
|
|
void pmic_enable_cpu_vdd(void);
|