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	Synchronise device tree with linux v6.0-rc1. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
		
			
				
	
	
		
			134 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			134 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright 2016 Freescale Semiconductor, Inc.
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|  * Copyright 2017-2018 NXP
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|  *   Dong Aisheng <aisheng.dong@nxp.com>
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|  */
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| 
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| /dts-v1/;
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| 
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| #include "imx7ulp.dtsi"
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| 
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| / {
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| 	model = "NXP i.MX7ULP EVK";
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| 	compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp";
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| 
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| 	chosen {
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| 		stdout-path = &lpuart4;
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| 	};
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| 
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| 	memory@60000000 {
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| 		device_type = "memory";
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| 		reg = <0x60000000 0x40000000>;
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| 	};
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| 
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| 	backlight {
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| 		compatible = "pwm-backlight";
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| 		pwms = <&tpm4 1 50000 0>;
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| 		brightness-levels = <0 20 25 30 35 40 100>;
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| 		default-brightness-level = <6>;
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| 		status = "okay";
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| 	};
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| 
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| 	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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| 		compatible = "regulator-fixed";
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&pinctrl_usbotg1_vbus>;
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| 		regulator-name = "usb_otg1_vbus";
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| 		regulator-min-microvolt = <5000000>;
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| 		regulator-max-microvolt = <5000000>;
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| 		gpio = <&gpio_ptc 0 GPIO_ACTIVE_HIGH>;
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| 		enable-active-high;
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| 	};
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| 
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| 	reg_vsd_3v3: regulator-vsd-3v3 {
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| 		compatible = "regulator-fixed";
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| 		regulator-name = "VSD_3V3";
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| 		regulator-min-microvolt = <3300000>;
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| 		regulator-max-microvolt = <3300000>;
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&pinctrl_usdhc0_rst>;
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| 		gpio = <&gpio_ptd 0 GPIO_ACTIVE_HIGH>;
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| 		enable-active-high;
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| 	};
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| };
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| 
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| &lpuart4 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_lpuart4>;
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| 	status = "okay";
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| };
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| 
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| &tpm4 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_pwm0>;
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| 	status = "okay";
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| };
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| 
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| &usbotg1 {
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| 	vbus-supply = <®_usb_otg1_vbus>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_usbotg1_id>;
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| 	srp-disable;
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| 	hnp-disable;
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| 	adp-disable;
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| 	disable-over-current;
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| 	status = "okay";
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| };
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| 
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| &usdhc0 {
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| 	assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
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| 	assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_usdhc0>;
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| 	cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>;
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| 	vmmc-supply = <®_vsd_3v3>;
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| 	status = "okay";
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| };
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| 
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| &iomuxc1 {
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| 	pinctrl_lpuart4: lpuart4grp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTC3__LPUART4_RX	0x3
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| 			IMX7ULP_PAD_PTC2__LPUART4_TX	0x3
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| 		>;
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| 		bias-pull-up;
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| 	};
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| 
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| 	pinctrl_pwm0: pwm0grp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTF2__TPM4_CH1	0x2
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| 		>;
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| 	};
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| 
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| 	pinctrl_usbotg1_vbus: otg1vbusgrp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTC0__PTC0		0x20000
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| 		>;
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| 	};
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| 
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| 	pinctrl_usbotg1_id: otg1idgrp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTC13__USB0_ID	0x10003
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| 		>;
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| 	};
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| 
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| 	pinctrl_usdhc0: usdhc0grp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTD1__SDHC0_CMD	0x43
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| 			IMX7ULP_PAD_PTD2__SDHC0_CLK	0x40
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| 			IMX7ULP_PAD_PTD7__SDHC0_D3	0x43
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| 			IMX7ULP_PAD_PTD8__SDHC0_D2	0x43
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| 			IMX7ULP_PAD_PTD9__SDHC0_D1	0x43
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| 			IMX7ULP_PAD_PTD10__SDHC0_D0	0x43
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| 			IMX7ULP_PAD_PTC10__PTC10	0x3	/* CD */
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| 		>;
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| 	};
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| 
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| 	pinctrl_usdhc0_rst: usdhc0-gpio-rst-grp {
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| 		fsl,pins = <
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| 			IMX7ULP_PAD_PTD0__PTD0		0x3
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| 		>;
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| 	};
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| };
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