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	Update device tree for ocelot to add support for ocelot pcb120. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
		
			
				
	
	
		
			76 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			76 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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| /*
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|  * Copyright (c) 2018 Microsemi Corporation
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|  */
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| 
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| /dts-v1/;
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| #include "mscc,ocelot_pcb.dtsi"
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| 
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| / {
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| 	model = "Ocelot PCB123 Reference Board";
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| 	compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	gpio-leds {
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| 		compatible = "gpio-leds";
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| 
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| 		status_green {
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| 			label = "pcb123:green:status";
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| 			gpios = <&sgpio 43 1>; /* p11.1 */
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| 			default-state = "on";
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| 		};
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| 
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| 		status_red {
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| 			label = "pcb123:red:status";
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| 			gpios = <&sgpio 11 1>; /* p11.0 */
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| 			default-state = "off";
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| 		};
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| 	};
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| };
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| 
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| &sgpio {
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| 	status = "okay";
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| 	mscc,sgpio-ports = <0x00FFFFFF>;
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| };
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| 
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| &mdio0 {
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| 	status = "okay";
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| 
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| 	phy0: ethernet-phy@0 {
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| 		reg = <0>;
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| 	};
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| 	phy1: ethernet-phy@1 {
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| 		reg = <1>;
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| 	};
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| 	phy2: ethernet-phy@2 {
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| 		reg = <2>;
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| 	};
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| 	phy3: ethernet-phy@3 {
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| 		reg = <3>;
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| 	};
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| };
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| 
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| &switch {
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| 	ethernet-ports {
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| 		port0: port@0 {
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| 			reg = <2>;
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| 			phy-handle = <&phy2>;
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| 		};
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| 		port1: port@1 {
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| 			reg = <3>;
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| 			phy-handle = <&phy3>;
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| 		};
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| 		port2: port@2 {
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| 			reg = <0>;
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| 			phy-handle = <&phy0>;
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| 		};
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| 		port3: port@3 {
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| 			reg = <1>;
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| 			phy-handle = <&phy1>;
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| 		};
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| 	};
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| };
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