mirror of
https://github.com/smaeul/u-boot.git
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715f599f8a
bd->bi_dram[] has both start address and size defined as 32-bit, which is not the case on some platforms where >=4GiB memory bank is used. Change them to support such memory banks. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
142 lines
5.1 KiB
C
142 lines
5.1 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*
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* (C) Copyright 2000 - 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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********************************************************************
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* NOTE: This header file defines an interface to U-Boot. Including
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* this (unmodified) header file in another file is considered normal
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* use of U-Boot, and does *not* fall under the heading of "derived
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* work".
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********************************************************************
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*/
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#ifndef __ASM_GENERIC_U_BOOT_H__
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#define __ASM_GENERIC_U_BOOT_H__
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/*
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* Board information passed to Linux kernel from U-Boot
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*
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* include/asm-ppc/u-boot.h
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*/
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#ifndef __ASSEMBLY__
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typedef struct bd_info {
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unsigned long bi_memstart; /* start of DRAM memory */
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phys_size_t bi_memsize; /* size of DRAM memory in bytes */
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unsigned long bi_flashstart; /* start of FLASH memory */
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unsigned long bi_flashsize; /* size of FLASH memory */
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unsigned long bi_flashoffset; /* reserved area for startup monitor */
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unsigned long bi_sramstart; /* start of SRAM memory */
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unsigned long bi_sramsize; /* size of SRAM memory */
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#ifdef CONFIG_AVR32
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unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */
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unsigned long bi_board_number;/* ATAG_BOARDINFO */
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#endif
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#ifdef CONFIG_ARM
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unsigned long bi_arm_freq; /* arm frequency */
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unsigned long bi_dsp_freq; /* dsp core frequency */
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unsigned long bi_ddr_freq; /* ddr frequency */
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#endif
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#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
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|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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unsigned long bi_immr_base; /* base of IMMR register */
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#endif
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#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
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unsigned long bi_mbar_base; /* base of internal registers */
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#endif
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#if defined(CONFIG_MPC83xx)
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unsigned long bi_immrbar;
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#endif
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unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
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unsigned long bi_ip_addr; /* IP Address */
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unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
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unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
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unsigned long bi_intfreq; /* Internal Freq, in MHz */
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unsigned long bi_busfreq; /* Bus Freq, in MHz */
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#if defined(CONFIG_CPM2)
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unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
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unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
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unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
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unsigned long bi_vco; /* VCO Out from PLL, in MHz */
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#endif
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#if defined(CONFIG_MPC512X)
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unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
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#endif /* CONFIG_MPC512X */
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#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
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unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
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unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
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#endif
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#if defined(CONFIG_EXTRA_CLOCK)
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unsigned long bi_inpfreq; /* input Freq in MHz */
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unsigned long bi_vcofreq; /* vco Freq in MHz */
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unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
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#endif
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#if defined(CONFIG_405) || \
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defined(CONFIG_405GP) || \
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defined(CONFIG_405EP) || \
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defined(CONFIG_405EZ) || \
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defined(CONFIG_405EX) || \
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defined(CONFIG_440)
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unsigned char bi_s_version[4]; /* Version of this structure */
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unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
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unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
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unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
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#endif
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#ifdef CONFIG_HAS_ETH1
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unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
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#endif
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#ifdef CONFIG_HAS_ETH2
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unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
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#endif
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#ifdef CONFIG_HAS_ETH3
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unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
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#endif
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#ifdef CONFIG_HAS_ETH4
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unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
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#endif
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#ifdef CONFIG_HAS_ETH5
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unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
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#endif
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#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
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defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
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defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
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defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
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defined(CONFIG_460EX) || defined(CONFIG_460GT)
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unsigned int bi_opbfreq; /* OPB clock in Hz */
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int bi_iic_fast[2]; /* Use fast i2c mode */
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#endif
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#if defined(CONFIG_4xx)
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#if defined(CONFIG_440GX) || \
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defined(CONFIG_460EX) || defined(CONFIG_460GT)
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int bi_phynum[4]; /* Determines phy mapping */
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int bi_phymode[4]; /* Determines phy mode */
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#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
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int bi_phynum[2]; /* Determines phy mapping */
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int bi_phymode[2]; /* Determines phy mode */
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#else
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int bi_phynum[1]; /* Determines phy mapping */
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int bi_phymode[1]; /* Determines phy mode */
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#endif
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#endif /* defined(CONFIG_4xx) */
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ulong bi_arch_number; /* unique id for this board */
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ulong bi_boot_params; /* where this board expects params */
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#ifdef CONFIG_NR_DRAM_BANKS
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struct { /* RAM configuration */
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phys_addr_t start;
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phys_size_t size;
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} bi_dram[CONFIG_NR_DRAM_BANKS];
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#endif /* CONFIG_NR_DRAM_BANKS */
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} bd_t;
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_GENERIC_U_BOOT_H__ */
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