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	- Cleanup a lot of fix values, and use defines instead. - Also make some values configurable through the board config file. - delete the NAND_SPL code for da850, as it is not used actually - remove the asm code Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
		
			
				
	
	
		
			53 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			53 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2011
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|  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| #ifndef _DV_AINTC_DEFS_H_
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| #define _DV_AINTC_DEFS_H_
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| 
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| struct dv_aintc_regs {
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| 	unsigned int	fiq0;		/* 0x00 */
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| 	unsigned int	fiq1;		/* 0x04 */
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| 	unsigned int	irq0;		/* 0x08 */
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| 	unsigned int	irq1;		/* 0x0c */
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| 	unsigned int	fiqentry;	/* 0x10 */
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| 	unsigned int	irqentry;	/* 0x14 */
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| 	unsigned int	eint0;		/* 0x18 */
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| 	unsigned int	eint1;		/* 0x1c */
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| 	unsigned int	intctl;		/* 0x20 */
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| 	unsigned int	eabase;		/* 0x24 */
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| 	unsigned char	rsvd0[8];	/* 0x28 */
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| 	unsigned int	intpri0;	/* 0x30 */
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| 	unsigned int	intpri1;	/* 0x34 */
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| 	unsigned int	intpri2;	/* 0x38 */
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| 	unsigned int	intpri3;	/* 0x3c */
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| 	unsigned int	intpri4;	/* 0x40 */
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| 	unsigned int	intpri5;	/* 0x44 */
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| 	unsigned int	intpri6;	/* 0x48 */
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| 	unsigned int	intpri7;	/* 0x4c */
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| };
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| 
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| #define dv_aintc_regs ((struct dv_aintc_regs *)DAVINCI_ARM_INTC_BASE)
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| 
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| #define DV_AINTC_INTCTL_IDMODE	(1 << 2)
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| 
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| #endif /* _DV_AINTC_DEFS_H_ */
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