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d5c5132f87
This makes is possible to use those gpio functions from other MVEBU SoC's as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
50 lines
1.6 KiB
C
50 lines
1.6 KiB
C
/*
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* arch/asm-arm/mach-kirkwood/include/mach/gpio.h
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
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* Removed kernel level irq handling. Took some macros from kernel to
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* allow build.
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*
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* Dieter Kiermaier dk-arm-linux@gmx.de
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*/
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#ifndef __KIRKWOOD_GPIO_H
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#define __KIRKWOOD_GPIO_H
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/* got from kernel include/linux/bitops.h */
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#define BITS_PER_BYTE 8
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#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
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#define GPIO_MAX 50
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#define GPIO_OFF(pin) (((pin) >> 5) ? 0x0040 : 0x0000)
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#define GPIO_OUT(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
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#define GPIO_IO_CONF(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
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#define GPIO_BLINK_EN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
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#define GPIO_IN_POL(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
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#define GPIO_DATA_IN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
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#define GPIO_EDGE_CAUSE(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
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#define GPIO_EDGE_MASK(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
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#define GPIO_LEVEL_MASK(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
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/*
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* Kirkwood-specific GPIO API
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*/
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void kw_gpio_set_valid(unsigned pin, int mode);
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int kw_gpio_is_valid(unsigned pin, int mode);
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int kw_gpio_direction_input(unsigned pin);
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int kw_gpio_direction_output(unsigned pin, int value);
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int kw_gpio_get_value(unsigned pin);
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void kw_gpio_set_value(unsigned pin, int value);
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void kw_gpio_set_blink(unsigned pin, int blink);
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void kw_gpio_set_unused(unsigned pin);
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#define GPIO_INPUT_OK (1 << 0)
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#define GPIO_OUTPUT_OK (1 << 1)
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#endif
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