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71858454fe
Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10 input/output port expander and can be used to increase the number of I/Os available to a processor. Signed-off-by: Alice Guo <alice.guo@nxp.com>
239 lines
5.8 KiB
C
239 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 NXP
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*
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* ADP5585 I/O Expander Controller
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*
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* Author: Alice Guo <alice.guo@nxp.com>
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*/
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#include <asm/gpio.h>
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#include <dm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <i2c.h>
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#define ADP5585_ID 0x00
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#define ADP5585_INT_STATUS 0x01
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#define ADP5585_STATUS 0x02
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#define ADP5585_FIFO_1 0x03
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#define ADP5585_FIFO_2 0x04
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#define ADP5585_FIFO_3 0x05
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#define ADP5585_FIFO_4 0x06
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#define ADP5585_FIFO_5 0x07
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#define ADP5585_FIFO_6 0x08
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#define ADP5585_FIFO_7 0x09
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#define ADP5585_FIFO_8 0x0A
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#define ADP5585_FIFO_9 0x0B
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#define ADP5585_FIFO_10 0x0C
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#define ADP5585_FIFO_11 0x0D
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#define ADP5585_FIFO_12 0x0E
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#define ADP5585_FIFO_13 0x0F
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#define ADP5585_FIFO_14 0x10
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#define ADP5585_FIFO_15 0x11
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#define ADP5585_FIFO_16 0x12
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#define ADP5585_GPI_INT_STAT_A 0x13
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#define ADP5585_GPI_INT_STAT_B 0x14
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#define ADP5585_GPI_STATUS_A 0x15
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#define ADP5585_GPI_STATUS_B 0x16
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#define ADP5585_RPULL_CONFIG_A 0x17
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#define ADP5585_RPULL_CONFIG_B 0x18
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#define ADP5585_RPULL_CONFIG_C 0x19
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#define ADP5585_RPULL_CONFIG_D 0x1A
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#define ADP5585_GPI_INT_LEVEL_A 0x1B
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#define ADP5585_GPI_INT_LEVEL_B 0x1C
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#define ADP5585_GPI_EVENT_EN_A 0x1D
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#define ADP5585_GPI_EVENT_EN_B 0x1E
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#define ADP5585_GPI_INTERRUPT_EN_A 0x1F
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#define ADP5585_GPI_INTERRUPT_EN_B 0x20
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#define ADP5585_DEBOUNCE_DIS_A 0x21
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#define ADP5585_DEBOUNCE_DIS_B 0x22
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#define ADP5585_GPO_DATA_OUT_A 0x23
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#define ADP5585_GPO_DATA_OUT_B 0x24
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#define ADP5585_GPO_OUT_MODE_A 0x25
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#define ADP5585_GPO_OUT_MODE_B 0x26
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#define ADP5585_GPIO_DIRECTION_A 0x27
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#define ADP5585_GPIO_DIRECTION_B 0x28
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#define ADP5585_RESET1_EVENT_A 0x29
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#define ADP5585_RESET1_EVENT_B 0x2A
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#define ADP5585_RESET1_EVENT_C 0x2B
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#define ADP5585_RESET2_EVENT_A 0x2C
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#define ADP5585_RESET2_EVENT_B 0x2D
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#define ADP5585_RESET_CFG 0x2E
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#define ADP5585_PWM_OFFT_LOW 0x2F
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#define ADP5585_PWM_OFFT_HIGH 0x30
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#define ADP5585_PWM_ONT_LOW 0x31
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#define ADP5585_PWM_ONT_HIGH 0x32
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#define ADP5585_PWM_CFG 0x33
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#define ADP5585_LOGIC_CFG 0x34
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#define ADP5585_LOGIC_FF_CFG 0x35
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#define ADP5585_LOGIC_INT_EVENT_EN 0x36
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#define ADP5585_POLL_PTIME_CFG 0x37
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#define ADP5585_PIN_CONFIG_A 0x38
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#define ADP5585_PIN_CONFIG_B 0x39
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#define ADP5585_PIN_CONFIG_D 0x3A
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#define ADP5585_GENERAL_CFG 0x3B
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#define ADP5585_INT_EN 0x3C
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#define ADP5585_MAXGPIO 10
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#define ADP5585_BANK(offs) ((offs) > 4)
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#define ADP5585_BIT(offs) ((offs) > 4 ? \
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1u << ((offs) - 5) : 1u << (offs))
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struct adp5585_plat {
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fdt_addr_t addr;
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u8 id;
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u8 dat_out[2];
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u8 dir[2];
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};
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static int adp5585_direction_input(struct udevice *dev, unsigned int offset)
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{
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int ret;
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unsigned int bank;
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struct adp5585_plat *plat = dev_get_plat(dev);
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bank = ADP5585_BANK(offset);
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plat->dir[bank] &= ~ADP5585_BIT(offset);
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ret = dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1);
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return ret;
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}
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static int adp5585_direction_output(struct udevice *dev, unsigned int offset,
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int value)
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{
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int ret;
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unsigned int bank, bit;
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struct adp5585_plat *plat = dev_get_plat(dev);
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bank = ADP5585_BANK(offset);
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bit = ADP5585_BIT(offset);
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plat->dir[bank] |= bit;
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if (value)
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plat->dat_out[bank] |= bit;
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else
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plat->dat_out[bank] &= ~bit;
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ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1);
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ret |= dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1);
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return ret;
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}
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static int adp5585_get_value(struct udevice *dev, unsigned int offset)
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{
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struct adp5585_plat *plat = dev_get_plat(dev);
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unsigned int bank = ADP5585_BANK(offset);
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unsigned int bit = ADP5585_BIT(offset);
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u8 val;
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if (plat->dir[bank] & bit)
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val = plat->dat_out[bank];
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else
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dm_i2c_read(dev, ADP5585_GPI_STATUS_A + bank, &val, 1);
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return !!(val & bit);
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}
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static int adp5585_set_value(struct udevice *dev, unsigned int offset, int value)
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{
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int ret;
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unsigned int bank, bit;
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struct adp5585_plat *plat = dev_get_plat(dev);
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bank = ADP5585_BANK(offset);
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bit = ADP5585_BIT(offset);
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if (value)
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plat->dat_out[bank] |= bit;
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else
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plat->dat_out[bank] &= ~bit;
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ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1);
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return ret;
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}
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static int adp5585_get_function(struct udevice *dev, unsigned int offset)
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{
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unsigned int bank, bit, dir;
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struct adp5585_plat *plat = dev_get_plat(dev);
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bank = ADP5585_BANK(offset);
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bit = ADP5585_BIT(offset);
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dir = plat->dir[bank] & bit;
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if (!dir)
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return GPIOF_INPUT;
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else
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return GPIOF_OUTPUT;
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}
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static int adp5585_xlate(struct udevice *dev, struct gpio_desc *desc,
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struct ofnode_phandle_args *args)
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{
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desc->offset = args->args[0];
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desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
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return 0;
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}
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static const struct dm_gpio_ops adp5585_ops = {
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.direction_input = adp5585_direction_input,
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.direction_output = adp5585_direction_output,
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.get_value = adp5585_get_value,
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.set_value = adp5585_set_value,
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.get_function = adp5585_get_function,
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.xlate = adp5585_xlate,
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};
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static int adp5585_probe(struct udevice *dev)
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{
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struct adp5585_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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int ret;
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if (!plat)
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return 0;
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plat->addr = dev_read_addr(dev);
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if (plat->addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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ret = dm_i2c_read(dev, ADP5585_ID, &plat->id, 1);
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if (ret < 0)
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return ret;
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uc_priv->gpio_count = ADP5585_MAXGPIO;
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uc_priv->bank_name = "adp5585-gpio";
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for (int i = 0; i < 2; i++) {
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ret = dm_i2c_read(dev, ADP5585_GPO_DATA_OUT_A + i, &plat->dat_out[i], 1);
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if (ret)
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return ret;
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ret = dm_i2c_read(dev, ADP5585_GPIO_DIRECTION_A + i, &plat->dir[i], 1);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct udevice_id adp5585_ids[] = {
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{ .compatible = "adp5585" },
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{ }
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};
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U_BOOT_DRIVER(adp5585) = {
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.name = "adp5585",
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.id = UCLASS_GPIO,
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.of_match = adp5585_ids,
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.probe = adp5585_probe,
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.ops = &adp5585_ops,
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.plat_auto = sizeof(struct adp5585_plat),
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};
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