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	Remapping console logs from soc uart2 (s1 terminal) to css non-secure (uart_ap terminal) Signed-off-by: Annam Sai Manisha <annam.saimanisha@arm.com>
		
			
				
	
	
		
			48 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			48 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * Configuration for Total Compute platform. Parts were derived from other ARM
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 * configurations.
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 * (C) Copyright 2020-2023 Arm Limited
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 * Usama Arif <usama.arif@arm.com>
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 */
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#ifndef __TOTAL_COMPUTE_H
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#define __TOTAL_COMPUTE_H
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/* Link Definitions */
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/* AP non-secure UART base address */
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#define UART0_BASE		0x2A400000
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/* PL011 Serial Configuration */
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#define CFG_PL011_CLOCK	7372800
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/* Miscellaneous configurable options */
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/* Physical Memory Map */
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#define PHYS_SDRAM_1		0x80000000
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/* Top 48MB reserved for secure world use */
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#define DRAM_SEC_SIZE		0x03000000
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#define PHYS_SDRAM_1_SIZE	0x80000000 - DRAM_SEC_SIZE
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#define CFG_SYS_SDRAM_BASE	PHYS_SDRAM_1
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#define PHYS_SDRAM_2		0x8080000000
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#define PHYS_SDRAM_2_SIZE	0x180000000
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#define CFG_EXTRA_ENV_SETTINGS	\
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				"bootm_size=0x20000000\0"	\
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				"load_addr=0xa0000000\0"	\
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				"kernel_addr_r=0x80080000\0"	\
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				"initrd_addr_r=0x88000000\0"	\
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				"fdt_addr_r=0x83000000\0"
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/*
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 * If vbmeta partition is present, boot Android with verification using AVB.
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 * Else if system partition is present (no vbmeta partition), boot Android
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 * without verification (for development purposes).
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 * Else boot FIT image.
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 */
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#define CFG_SYS_FLASH_BASE		0x0C000000
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#endif /* __TOTAL_COMPUTE_H */
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