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	Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			166 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			166 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * (C) Copyright 2020 Cortina-Access Ltd.
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 * Common UART Driver for Cortina Access CAxxxx line of SoCs
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 *
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 */
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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/* Register definitions */
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#define UCFG			0x00	/* UART config register */
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#define UFC			0x04	/* Flow Control */
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#define URX_SAMPLE		0x08	/* UART RX Sample register */
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#define URT_TUNE		0x0C	/* Fine tune of UART clk */
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#define UTX_DATA		0x10	/* UART TX Character data */
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#define URX_DATA		0x14	/* UART RX Character data */
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#define UINFO			0x18	/* UART Info */
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#define UINT_EN0		0x1C	/* UART Interrupt enable 0 */
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#define UINT_EN1		0x20	/* UART Interrupt enable 1 */
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#define UINT0			0x24	/* UART Interrupt 0 setting/clearing */
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#define UINT1			0x28	/* UART Interrupt 1 setting/clearing */
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#define UINT_STAT		0x2C	/* UART Interrupt Status */
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/* UART Control Register Bit Fields */
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#define UCFG_BAUD_COUNT_MASK    0xFFFFFF00
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#define UCFG_BAUD_COUNT(x)	((x << 8) & UCFG_BAUD_COUNT_MASK)
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#define UCFG_EN			BIT(7)
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#define UCFG_RX_EN		BIT(6)
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#define UCFG_TX_EN		BIT(5)
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#define UCFG_PARITY_EN		BIT(4)
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#define UCFG_PARITY_SEL		BIT(3)
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#define UCFG_2STOP_BIT		BIT(2)
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#define UCFG_CNT1		BIT(1)
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#define UCFG_CNT0		BIT(0)
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#define UCFG_CHAR_5		0
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#define UCFG_CHAR_6		1
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#define UCFG_CHAR_7		2
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#define UCFG_CHAR_8		3
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#define UINFO_TX_FIFO_EMPTY	BIT(3)
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#define UINFO_TX_FIFO_FULL	BIT(2)
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#define UINFO_RX_FIFO_EMPTY	BIT(1)
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#define UINFO_RX_FIFO_FULL	BIT(0)
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#define UINT_RX_NON_EMPTY	BIT(6)
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#define UINT_TX_EMPTY		BIT(5)
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#define UINT_RX_UNDERRUN	BIT(4)
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#define UINT_RX_OVERRUN		BIT(3)
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#define UINT_RX_PARITY_ERR	BIT(2)
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#define UINT_RX_STOP_ERR	BIT(1)
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#define UINT_TX_OVERRUN		BIT(0)
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#define UINT_MASK_ALL		0x7F
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struct ca_uart_priv {
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	void __iomem *base;
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};
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int ca_serial_setbrg(struct udevice *dev, int baudrate)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	unsigned int uart_ctrl, baud, sample;
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	baud = CORTINA_UART_CLOCK / baudrate;
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	uart_ctrl = readl(priv->base + UCFG);
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	uart_ctrl &= ~UCFG_BAUD_COUNT_MASK;
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	uart_ctrl |= UCFG_BAUD_COUNT(baud);
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	writel(uart_ctrl, priv->base + UCFG);
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	sample = baud / 2;
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	sample = (sample < 7) ? 7 : sample;
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	writel(sample, priv->base + URX_SAMPLE);
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	return 0;
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}
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static int ca_serial_getc(struct udevice *dev)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	int ch;
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	ch = readl(priv->base + URX_DATA) & 0xFF;
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	return (int)ch;
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}
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static int ca_serial_putc(struct udevice *dev, const char ch)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	unsigned int status;
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	/* Retry if TX FIFO full */
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	status = readl(priv->base + UINFO);
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	if (status & UINFO_TX_FIFO_FULL)
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		return -EAGAIN;
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	writel(ch, priv->base + UTX_DATA);
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	return 0;
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}
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static int ca_serial_pending(struct udevice *dev, bool input)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	unsigned int status;
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	status = readl(priv->base + UINFO);
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	if (input)
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		return (status & UINFO_RX_FIFO_EMPTY) ? 0 : 1;
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	else
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		return (status & UINFO_TX_FIFO_FULL) ? 1 : 0;
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}
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static int ca_serial_probe(struct udevice *dev)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	u32 uart_ctrl;
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	/* Set data, parity and stop bits */
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	uart_ctrl = UCFG_EN | UCFG_TX_EN | UCFG_RX_EN | UCFG_CHAR_8;
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	writel(uart_ctrl, priv->base + UCFG);
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	return 0;
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}
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static int ca_serial_ofdata_to_platdata(struct udevice *dev)
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{
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	struct ca_uart_priv *priv = dev_get_priv(dev);
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	priv->base = dev_remap_addr_index(dev, 0);
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	if (!priv->base)
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		return -ENOENT;
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	return 0;
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}
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static const struct dm_serial_ops ca_serial_ops = {
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	.putc = ca_serial_putc,
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	.pending = ca_serial_pending,
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	.getc = ca_serial_getc,
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	.setbrg = ca_serial_setbrg,
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};
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static const struct udevice_id ca_serial_ids[] = {
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	{.compatible = "cortina,ca-uart"},
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	{}
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};
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U_BOOT_DRIVER(serial_cortina) = {
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	.name = "serial_cortina",
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	.id = UCLASS_SERIAL,
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	.of_match = ca_serial_ids,
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	.ofdata_to_platdata = ca_serial_ofdata_to_platdata,
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	.priv_auto_alloc_size = sizeof(struct ca_uart_priv),
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	.probe = ca_serial_probe,
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	.ops = &ca_serial_ops
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};
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