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4002eab2c2
Corrected the ranges table of the IFC node. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
104 lines
1.7 KiB
Plaintext
104 lines
1.7 KiB
Plaintext
/*
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* Device Tree Include file for Freescale Layerscape-1043A family SoC.
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*
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* Copyright (C) 2015, Freescale Semiconductor
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*
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* Mingkai Hu <Mingkai.hu@freescale.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/include/ "fsl-ls1043a.dtsi"
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/ {
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model = "LS1043A RDB Board";
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aliases {
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spi1 = &dspi0;
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};
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};
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&dspi0 {
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bus-num = <0>;
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status = "okay";
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dspiflash: n25q12a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <1000000>; /* input clock */
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};
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};
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&i2c0 {
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status = "okay";
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <1000>;
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};
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adt7461a@4c {
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compatible = "adi,adt7461a";
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reg = <0x4c>;
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};
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eeprom@52 {
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compatible = "at24,24c512";
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reg = <0x52>;
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};
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eeprom@53 {
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compatible = "at24,24c512";
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reg = <0x53>;
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};
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rtc@68 {
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compatible = "pericom,pt7c4338";
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reg = <0x68>;
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};
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};
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&ifc {
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status = "okay";
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#address-cells = <2>;
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#size-cells = <1>;
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/* NOR, NAND Flashes and FPGA on board */
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ranges = <0x0 0x0 0x0 0x60000000 0x08000000
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0x1 0x0 0x0 0x7e800000 0x00010000
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0x2 0x0 0x0 0x7fb00000 0x00000100>;
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nor@0,0 {
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compatible = "cfi-flash";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@1,0 {
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compatible = "fsl,ifc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x1 0x0 0x10000>;
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};
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cpld: board-control@2,0 {
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compatible = "fsl,ls1043ardb-cpld";
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reg = <0x2 0x0 0x0000100>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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