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	When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
		
			
				
	
	
		
			197 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			197 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright (C) 2011 Renesas Solutions Corp.
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|  * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
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|  *
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|  * board/renesas/ecovec/lowlevel_init.S
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|  */
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| 
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| #include <config.h>
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| #include <asm/processor.h>
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| #include <asm/macro.h>
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| #include <configs/ecovec.h>
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| 
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| 	.global	lowlevel_init
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| 
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| 	.text
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| 	.align	2
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| 
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| lowlevel_init:
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| 
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| 	/* jump to CONFIG_ECOVEC_ROMIMAGE_ADDR if bit 1 of PVDR_A */
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| 	mov.l	PVDR_A, r1
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| 	mov.l	PVDR_D, r2
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| 	mov.b	@r1, r0
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| 	tst	r0, r2
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| 	bt	1f
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| 	mov.l	JUMP_A, r1
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| 	jmp	@r1
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| 	nop
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| 
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| 1:
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| 	/* Disable watchdog */
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| 	write16 RWTCSR_A, RWTCSR_D
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| 
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| 	/* MMU Disable */
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| 	write32 MMUCR_A, MMUCR_D
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| 
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| 	/* Setup clocks */
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| 	write32 PLLCR_A, PLLCR_D
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| 	write32 FRQCRA_A, FRQCRA_D
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| 	write32 FRQCRB_A, FRQCRB_D
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| 
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| 	wait_timer TIMER_D
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| 
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| 	write32 MMSELR_A, MMSELR_D
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| 
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| 	/* Srtup BSC */
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| 	write32 CMNCR_A, CMNCR_D
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| 	write32 CS0BCR_A, CS0BCR_D
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| 	write32 CS0WCR_A, CS0WCR_D
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| 
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| 	wait_timer TIMER_D
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| 
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| 	/* Setup SDRAM */
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| 	write32 DBPDCNT0_A,	DBPDCNT0_D0
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| 	write32 DBCONF_A,	DBCONF_D
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| 	write32 DBTR0_A,	DBTR0_D
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| 	write32 DBTR1_A,	DBTR1_D
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| 	write32 DBTR2_A,	DBTR2_D
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| 	write32 DBTR3_A,	DBTR3_D
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| 	write32 DBKIND_A,	DBKIND_D
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| 	write32 DBCKECNT_A,	DBCKECNT_D
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| 
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| 	wait_timer TIMER_D
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| 
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| 	write32 DBCMDCNT_A,	DBCMDCNT_D0
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| 	write32 DBMRCNT_A, DBMRCNT_D0
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| 	write32 DBMRCNT_A, DBMRCNT_D1
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| 	write32 DBMRCNT_A, DBMRCNT_D2
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| 	write32 DBMRCNT_A, DBMRCNT_D3
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| 	write32 DBCMDCNT_A, DBCMDCNT_D0
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| 	write32 DBCMDCNT_A, DBCMDCNT_D1
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| 	write32 DBCMDCNT_A, DBCMDCNT_D1
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| 	write32 DBMRCNT_A, DBMRCNT_D4
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| 	write32 DBMRCNT_A, DBMRCNT_D5
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| 	write32 DBMRCNT_A, DBMRCNT_D6
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| 
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| 	wait_timer TIMER_D
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| 
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| 	write32 DBEN_A, DBEN_D
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| 	write32 DBRFPDN1_A, DBRFPDN1_D
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| 	write32 DBRFPDN2_A, DBRFPDN2_D
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| 	write32 DBCMDCNT_A, DBCMDCNT_D0
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| 
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| 
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| 	/* Dummy read */
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| 	mov.l DUMMY_A ,r1
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| 	synco
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| 	mov.l @r1, r0
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| 	synco
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| 
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| 	mov.l SDRAM_A ,r1
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| 	synco
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| 	mov.l @r1, r0
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| 	synco
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| 	wait_timer TIMER_D
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| 
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| 	add #4, r1
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| 	synco
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| 	mov.l @r1, r0
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| 	synco
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| 	wait_timer TIMER_D
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| 
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| 	add #4, r1
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| 	synco
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| 	mov.l @r1, r0
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| 	synco
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| 	wait_timer TIMER_D
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| 
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| 	add #4, r1
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| 	synco
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| 	mov.l @r1, r0
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| 	synco
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| 	wait_timer TIMER_D
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| 
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| 	write32 DBCMDCNT_A, DBCMDCNT_D0
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| 	write32 DBCMDCNT_A, DBCMDCNT_D1
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| 	write32 DBPDCNT0_A, DBPDCNT0_D1
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| 	write32 DBRFPDN0_A, DBRFPDN0_D
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| 
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| 	wait_timer TIMER_D
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| 
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| 	write32 CCR_A, CCR_D
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| 
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| 	stc	sr, r0
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| 	mov.l	SR_MASK_D, r1
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| 	and	r1, r0
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| 	ldc	r0, sr
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| 
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| 	rts
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| 
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| 	.align	2
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| 
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| PVDR_A:		.long	PVDR
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| PVDR_D:		.long	0x00000001
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| JUMP_A:		.long	CONFIG_ECOVEC_ROMIMAGE_ADDR
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| TIMER_D:	.long	64
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| RWTCSR_A:	.long	RWTCSR
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| RWTCSR_D:	.long	0x0000A507
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| MMUCR_A:	.long	MMUCR
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| MMUCR_D:	.long	0x00000004
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| PLLCR_A:	.long	PLLCR
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| PLLCR_D:	.long	0x00004000
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| FRQCRA_A:	.long	FRQCRA
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| FRQCRA_D:	.long	0x8E003508
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| FRQCRB_A:	.long	FRQCRB
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| FRQCRB_D:	.long	0x0
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| MMSELR_A:	.long	MMSELR
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| MMSELR_D:	.long	0xA5A50000
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| CMNCR_A:	.long	CMNCR
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| CMNCR_D:	.long	0x00000013
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| CS0BCR_A:	.long	CS0BCR
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| CS0BCR_D:	.long	0x11110400
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| CS0WCR_A:	.long	CS0WCR
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| CS0WCR_D:	.long	0x00000440
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| DBPDCNT0_A:	.long	DBPDCNT0
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| DBPDCNT0_D0: .long	0x00000181
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| DBPDCNT0_D1: .long	0x00000080
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| DBCONF_A:	.long	DBCONF
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| DBCONF_D:	.long	0x015B0002
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| DBTR0_A:	.long 	DBTR0
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| DBTR0_D:	.long 	0x03061502
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| DBTR1_A:	.long	DBTR1
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| DBTR1_D:	.long	0x02020102
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| DBTR2_A:	.long	DBTR2
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| DBTR2_D:	.long	0x01090305
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| DBTR3_A:	.long	DBTR3
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| DBTR3_D:	.long	0x00000002
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| DBKIND_A:	.long	DBKIND
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| DBKIND_D:	.long	0x00000005
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| DBCKECNT_A:	.long	DBCKECNT
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| DBCKECNT_D:	.long	0x00000001
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| DBCMDCNT_A:	.long	DBCMDCNT
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| DBCMDCNT_D0:.long	0x2
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| DBCMDCNT_D1:.long	0x4
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| DBMRCNT_A:	.long	DBMRCNT
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| DBMRCNT_D0:	.long	0x00020000
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| DBMRCNT_D1:	.long	0x00030000
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| DBMRCNT_D2:	.long	0x00010040
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| DBMRCNT_D3:	.long	0x00000532
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| DBMRCNT_D4:	.long	0x00000432
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| DBMRCNT_D5:	.long	0x000103C0
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| DBMRCNT_D6:	.long	0x00010040
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| DBEN_A:		.long	DBEN
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| DBEN_D:		.long	0x01
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| DBRFPDN0_A:	.long	DBRFPDN0
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| DBRFPDN1_A:	.long	DBRFPDN1
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| DBRFPDN2_A:	.long	DBRFPDN2
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| DBRFPDN0_D:	.long	0x00010000
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| DBRFPDN1_D:	.long	0x00000613
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| DBRFPDN2_D:	.long	0x238C003A
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| SDRAM_A:	.long	0xa8000000
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| DUMMY_A:	.long	0x0c400000
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| CCR_A:		.long	CCR
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| CCR_D:		.long	0x0000090B
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| SR_MASK_D:	.long	0xEFFFFF0F
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