mirror of
https://github.com/smaeul/u-boot.git
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d239d9d946
Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
509 lines
12 KiB
Plaintext
509 lines
12 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2019 NXP
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include "imx8mm.dtsi"
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/ {
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model = "FSL i.MX8MM EVK board";
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compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
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chosen {
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stdout-path = &uart2;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_led>;
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status {
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label = "status";
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gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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wm8524: audio-codec {
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#sound-dai-cells = <0>;
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compatible = "wlf,wm8524";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_wlf>;
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wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
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};
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sound-wm8524 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "wm8524-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&cpudai>;
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simple-audio-card,bitclock-master = <&cpudai>;
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simple-audio-card,widgets =
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"Line", "Left Line Out Jack",
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"Line", "Right Line Out Jack";
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simple-audio-card,routing =
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"Left Line Out Jack", "LINEVOUTL",
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"Right Line Out Jack", "LINEVOUTR";
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cpudai: simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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simple-audio-card,codec {
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sound-dai = <&wm8524>;
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clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
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};
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@4b {
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compatible = "rohm,bd71847";
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reg = <0x4b>;
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 GPIO_ACTIVE_LOW>;
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rohm,reset-snvs-powered;
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regulators {
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buck1_reg: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck2_reg: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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rohm,dvs-run-voltage = <1000000>;
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rohm,dvs-idle-voltage = <900000>;
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};
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buck3_reg: BUCK3 {
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// BUCK5 in datasheet
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regulator-name = "BUCK3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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// BUCK6 in datasheet
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5_reg: BUCK5 {
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// BUCK7 in datasheet
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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// BUCK8 in datasheet
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regulator-name = "BUCK6";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "LDO6";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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ptn5110: tcpc@50 {
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compatible = "nxp,ptn5110";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec1>;
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reg = <0x50>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 8>;
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status = "okay";
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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typec1_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 20000, 3000)>;
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op-sink-microwatt = <15000000>;
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self-powered;
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};
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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pca6416: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&uart2 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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vmmc-supply = <®_usdhc2_vmmc>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
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MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
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MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
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MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
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MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
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MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
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MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
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MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
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MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
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MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
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MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
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MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
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MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
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MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
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MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
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>;
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};
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pinctrl_gpio_led: gpioledgrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
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>;
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};
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pinctrl_gpio_wlf: gpiowlfgrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
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MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
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>;
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};
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pinctrl_pmic: pmicirq {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
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>;
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};
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pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
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MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
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MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
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MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
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>;
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};
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pinctrl_typec1: typec1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
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MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2grpgpio {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
|
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
|
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
|
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
|
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
|
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
|
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
|
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
|
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
|
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
|
fsl,pins = <
|
|
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
|
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
|
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
|
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
|
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
|
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
|
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
|
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
|
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
|
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
|
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
|
fsl,pins = <
|
|
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
|
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
|
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
|
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
|
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
|
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
|
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
|
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
|
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
|
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
|
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog: wdoggrp {
|
|
fsl,pins = <
|
|
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
|
>;
|
|
};
|
|
};
|