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ba42c286f6
Add usb, phy and clock nodes Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
98 lines
1.3 KiB
Plaintext
98 lines
1.3 KiB
Plaintext
/*
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* Copyright (C) 2018 MediaTek Inc.
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* Author: Ryder Lee <ryder.lee@mediatek.com>
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*
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* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*/
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/dts-v1/;
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#include "mt7629.dtsi"
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#include "mt7629-rfb-u-boot.dtsi"
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/ {
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model = "MediaTek MT7629 RFB";
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compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
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aliases {
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spi0 = &snfi;
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};
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chosen {
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stdout-path = &uart0;
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};
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <1>;
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phy-mode = "gmii";
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&pinctrl {
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snfi_pins: snfi-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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snor_pins: snor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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uart0_pins: uart0-default {
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mux {
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function = "uart";
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groups = "uart0_txd_rxd";
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};
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};
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watchdog_pins: watchdog-default {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&snfi {
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pinctrl-names = "default", "snfi";
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pinctrl-0 = <&snor_pins>;
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pinctrl-1 = <&snfi_pins>;
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status = "okay";
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spi-flash@0{
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compatible = "jedec,spi-nor";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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