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4711788267
The total FIFO size of some SoCs may be different from the existen, this patch supports fifo size setting from platform data. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
31 lines
684 B
C
31 lines
684 B
C
/*
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* drivers/usb/gadget/dwc2_udc.h
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* Designware DWC2 on-chip full/high speed USB device controllers
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* Copyright (C) 2005 for Samsung Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DWC2_USB_GADGET
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#define __DWC2_USB_GADGET
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#define PHY0_SLEEP (1 << 5)
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struct dwc2_plat_otg_data {
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void *priv;
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int phy_of_node;
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int (*phy_control)(int on);
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unsigned int regs_phy;
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unsigned int regs_otg;
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unsigned int usb_phy_ctrl;
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unsigned int usb_flags;
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unsigned int usb_gusbcfg;
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unsigned int rx_fifo_sz;
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unsigned int np_tx_fifo_sz;
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unsigned int tx_fifo_sz;
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};
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int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
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#endif /* __DWC2_USB_GADGET */
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