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5891282bf3
This adds support for the TRNG found in the RK3588 SoC to the rockchip_rng driver so that it can be used for things such as seeding randomness to Linux. Changes in V3: - Moved notes from commit to cover letter. - Added Reviewed-By tag. Changes in V2: - Modified Kconfig to note that the Rockchip RNG driver supports all versions of the hardware (v1, v2, and the trng in the rk3588). Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
328 lines
7.9 KiB
C
328 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <asm/arch-rockchip/hardware.h>
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#include <asm/io.h>
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#include <common.h>
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#include <dm.h>
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#include <linux/bitops.h>
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#include <linux/iopoll.h>
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#include <linux/string.h>
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#include <rng.h>
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#define RK_HW_RNG_MAX 32
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#define _SBF(s, v) ((v) << (s))
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/* start of CRYPTO V1 register define */
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#define CRYPTO_V1_CTRL 0x0008
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#define CRYPTO_V1_RNG_START BIT(8)
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#define CRYPTO_V1_RNG_FLUSH BIT(9)
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#define CRYPTO_V1_TRNG_CTRL 0x0200
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#define CRYPTO_V1_OSC_ENABLE BIT(16)
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#define CRYPTO_V1_TRNG_SAMPLE_PERIOD(x) (x)
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#define CRYPTO_V1_TRNG_DOUT_0 0x0204
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/* end of CRYPTO V1 register define */
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/* start of CRYPTO V2 register define */
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#define CRYPTO_V2_RNG_CTL 0x0400
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#define CRYPTO_V2_RNG_64_BIT_LEN _SBF(4, 0x00)
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#define CRYPTO_V2_RNG_128_BIT_LEN _SBF(4, 0x01)
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#define CRYPTO_V2_RNG_192_BIT_LEN _SBF(4, 0x02)
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#define CRYPTO_V2_RNG_256_BIT_LEN _SBF(4, 0x03)
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#define CRYPTO_V2_RNG_FATESY_SOC_RING _SBF(2, 0x00)
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#define CRYPTO_V2_RNG_SLOWER_SOC_RING_0 _SBF(2, 0x01)
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#define CRYPTO_V2_RNG_SLOWER_SOC_RING_1 _SBF(2, 0x02)
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#define CRYPTO_V2_RNG_SLOWEST_SOC_RING _SBF(2, 0x03)
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#define CRYPTO_V2_RNG_ENABLE BIT(1)
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#define CRYPTO_V2_RNG_START BIT(0)
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#define CRYPTO_V2_RNG_SAMPLE_CNT 0x0404
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#define CRYPTO_V2_RNG_DOUT_0 0x0410
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/* end of CRYPTO V2 register define */
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/* start of TRNG V1 register define */
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#define TRNG_V1_CTRL 0x0000
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#define TRNG_V1_CTRL_NOP _SBF(0, 0x00)
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#define TRNG_V1_CTRL_RAND _SBF(0, 0x01)
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#define TRNG_V1_CTRL_SEED _SBF(0, 0x02)
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#define TRNG_V1_MODE 0x0008
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#define TRNG_V1_MODE_128_BIT _SBF(3, 0x00)
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#define TRNG_V1_MODE_256_BIT _SBF(3, 0x01)
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#define TRNG_V1_IE 0x0010
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#define TRNG_V1_IE_GLBL_EN BIT(31)
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#define TRNG_V1_IE_SEED_DONE_EN BIT(1)
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#define TRNG_V1_IE_RAND_RDY_EN BIT(0)
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#define TRNG_V1_ISTAT 0x0014
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#define TRNG_V1_ISTAT_RAND_RDY BIT(0)
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/* RAND0 ~ RAND7 */
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#define TRNG_V1_RAND0 0x0020
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#define TRNG_V1_RAND7 0x003C
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#define TRNG_V1_AUTO_RQSTS 0x0060
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#define TRNG_V1_VERSION 0x00F0
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#define TRNG_v1_VERSION_CODE 0x46BC
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/* end of TRNG V1 register define */
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#define RK_RNG_TIME_OUT 50000 /* max 50ms */
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#define trng_write(pdata, pos, val) writel(val, (pdata)->base + (pos))
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#define trng_read(pdata, pos) readl((pdata)->base + (pos))
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struct rk_rng_soc_data {
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int (*rk_rng_init)(struct udevice *dev);
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int (*rk_rng_read)(struct udevice *dev, void *data, size_t len);
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};
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struct rk_rng_plat {
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fdt_addr_t base;
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struct rk_rng_soc_data *soc_data;
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};
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static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size)
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{
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u32 count = RK_HW_RNG_MAX / sizeof(u32);
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u32 reg, tmp_len;
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if (size > RK_HW_RNG_MAX)
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return -EINVAL;
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while (size && count) {
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reg = readl(addr);
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tmp_len = min(size, sizeof(u32));
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memcpy(buf, ®, tmp_len);
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addr += sizeof(u32);
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buf += tmp_len;
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size -= tmp_len;
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count--;
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}
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return 0;
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}
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static int rk_cryptov1_rng_read(struct udevice *dev, void *data, size_t len)
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{
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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u32 reg = 0;
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int retval;
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if (len > RK_HW_RNG_MAX)
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return -EINVAL;
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/* enable osc_ring to get entropy, sample period is set as 100 */
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writel(CRYPTO_V1_OSC_ENABLE | CRYPTO_V1_TRNG_SAMPLE_PERIOD(100),
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pdata->base + CRYPTO_V1_TRNG_CTRL);
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rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START,
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CRYPTO_V1_RNG_START);
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retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg,
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!(reg & CRYPTO_V1_RNG_START),
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RK_RNG_TIME_OUT);
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if (retval)
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goto exit;
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rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len);
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exit:
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/* close TRNG */
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rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START);
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return 0;
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}
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static int rk_cryptov2_rng_read(struct udevice *dev, void *data, size_t len)
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{
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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u32 reg = 0;
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int retval;
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if (len > RK_HW_RNG_MAX)
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return -EINVAL;
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/* enable osc_ring to get entropy, sample period is set as 100 */
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writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT);
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reg |= CRYPTO_V2_RNG_256_BIT_LEN;
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reg |= CRYPTO_V2_RNG_SLOWER_SOC_RING_0;
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reg |= CRYPTO_V2_RNG_ENABLE;
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reg |= CRYPTO_V2_RNG_START;
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rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg);
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retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg,
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!(reg & CRYPTO_V2_RNG_START),
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RK_RNG_TIME_OUT);
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if (retval)
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goto exit;
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rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len);
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exit:
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/* close TRNG */
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rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff);
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return retval;
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}
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static int rk_trngv1_init(struct udevice *dev)
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{
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u32 status, version;
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u32 auto_reseed_cnt = 1000;
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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version = trng_read(pdata, TRNG_V1_VERSION);
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if (version != TRNG_v1_VERSION_CODE) {
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printf("wrong trng version, expected = %08x, actual = %08x",
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TRNG_V1_VERSION, version);
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return -EFAULT;
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}
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/* wait in case of RND_RDY triggered at firs power on */
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readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, status,
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(status & TRNG_V1_ISTAT_RAND_RDY),
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RK_RNG_TIME_OUT);
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/* clear RAND_RDY flag for first power on */
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trng_write(pdata, TRNG_V1_ISTAT, status);
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/* auto reseed after (auto_reseed_cnt * 16) byte rand generate */
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trng_write(pdata, TRNG_V1_AUTO_RQSTS, auto_reseed_cnt);
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return 0;
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}
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static int rk_trngv1_rng_read(struct udevice *dev, void *data, size_t len)
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{
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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u32 reg = 0;
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int retval;
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if (len > RK_HW_RNG_MAX)
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return -EINVAL;
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trng_write(pdata, TRNG_V1_MODE, TRNG_V1_MODE_256_BIT);
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trng_write(pdata, TRNG_V1_CTRL, TRNG_V1_CTRL_RAND);
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retval = readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, reg,
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(reg & TRNG_V1_ISTAT_RAND_RDY),
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RK_RNG_TIME_OUT);
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/* clear ISTAT */
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trng_write(pdata, TRNG_V1_ISTAT, reg);
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if (retval)
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goto exit;
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rk_rng_read_regs(pdata->base + TRNG_V1_RAND0, data, len);
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exit:
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/* close TRNG */
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trng_write(pdata, TRNG_V1_CTRL, TRNG_V1_CTRL_NOP);
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return retval;
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}
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static int rockchip_rng_read(struct udevice *dev, void *data, size_t len)
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{
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unsigned char *buf = data;
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unsigned int i;
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int ret = -EIO;
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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if (!len)
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return 0;
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if (!pdata->soc_data || !pdata->soc_data->rk_rng_read)
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return -EINVAL;
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for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) {
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ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX);
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if (ret)
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goto exit;
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}
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if (len % RK_HW_RNG_MAX)
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ret = pdata->soc_data->rk_rng_read(dev, buf,
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len % RK_HW_RNG_MAX);
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exit:
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return ret;
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}
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static int rockchip_rng_of_to_plat(struct udevice *dev)
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{
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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memset(pdata, 0x00, sizeof(*pdata));
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pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev);
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if (!pdata->base)
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return -ENOMEM;
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return 0;
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}
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static int rockchip_rng_probe(struct udevice *dev)
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{
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struct rk_rng_plat *pdata = dev_get_priv(dev);
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int ret = 0;
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pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev);
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if (pdata->soc_data->rk_rng_init)
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ret = pdata->soc_data->rk_rng_init(dev);
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return ret;
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}
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static const struct rk_rng_soc_data rk_cryptov1_soc_data = {
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.rk_rng_read = rk_cryptov1_rng_read,
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};
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static const struct rk_rng_soc_data rk_cryptov2_soc_data = {
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.rk_rng_read = rk_cryptov2_rng_read,
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};
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static const struct rk_rng_soc_data rk_trngv1_soc_data = {
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.rk_rng_init = rk_trngv1_init,
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.rk_rng_read = rk_trngv1_rng_read,
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};
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static const struct dm_rng_ops rockchip_rng_ops = {
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.read = rockchip_rng_read,
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};
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static const struct udevice_id rockchip_rng_match[] = {
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{
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.compatible = "rockchip,cryptov1-rng",
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.data = (ulong)&rk_cryptov1_soc_data,
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},
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{
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.compatible = "rockchip,cryptov2-rng",
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.data = (ulong)&rk_cryptov2_soc_data,
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},
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{
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.compatible = "rockchip,trngv1",
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.data = (ulong)&rk_trngv1_soc_data,
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},
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{},
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};
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U_BOOT_DRIVER(rockchip_rng) = {
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.name = "rockchip-rng",
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.id = UCLASS_RNG,
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.of_match = rockchip_rng_match,
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.ops = &rockchip_rng_ops,
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.probe = rockchip_rng_probe,
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.of_to_plat = rockchip_rng_of_to_plat,
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.priv_auto = sizeof(struct rk_rng_plat),
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};
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