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	Add phy driver support for MACs embedded inside Cortina Access SoCs Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com> CC: Aaron Tseng <aaron.tseng@cortina-access.com> Moved out PHY specific code out of Cortina NI Ethernet driver and into a Cortina Access PHY interface driver
		
			
				
	
	
		
			315 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			315 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| 
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| config BITBANGMII
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| 	bool "Bit-banged ethernet MII management channel support"
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| 
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| config MV88E6352_SWITCH
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| 	bool "Marvell 88E6352 switch support"
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| 
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| menuconfig PHYLIB
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| 	bool "Ethernet PHY (physical media interface) support"
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| 	depends on NET
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| 	help
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| 	  Enable Ethernet PHY (physical media interface) support.
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| 
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| if PHYLIB
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| 
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| config PHY_ADDR_ENABLE
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| 	bool "Limit phy address"
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| 	default y if ARCH_SUNXI
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| 	help
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| 	  Select this if you want to control which phy address is used
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| 
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| if PHY_ADDR_ENABLE
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| config PHY_ADDR
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| 	int "PHY address"
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| 	default 1 if ARCH_SUNXI
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| 	default 0
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| 	help
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| 	  The address of PHY on MII bus. Usually in range of 0 to 31.
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| endif
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| 
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| config B53_SWITCH
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| 	bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
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| 	help
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| 	  Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
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| 	  This currently supports BCM53125 and similar models.
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| 
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| if B53_SWITCH
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| 
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| config B53_CPU_PORT
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| 	int "CPU port"
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| 	default 8
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| 
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| config B53_PHY_PORTS
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| 	hex "Bitmask of PHY ports"
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| 
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| endif # B53_SWITCH
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| 
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| config MV88E61XX_SWITCH
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| 	bool "Marvell MV88E61xx Ethernet switch PHY support."
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| 
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| if MV88E61XX_SWITCH
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| 
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| config MV88E61XX_CPU_PORT
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| 	int "CPU Port"
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| 
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| config MV88E61XX_PHY_PORTS
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| 	hex "Bitmask of PHY Ports"
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| 
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| config MV88E61XX_FIXED_PORTS
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| 	hex "Bitmask of PHYless serdes Ports"
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| 
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| endif # MV88E61XX_SWITCH
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| 
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| config PHYLIB_10G
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| 	bool "Generic 10G PHY support"
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| 
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| menuconfig PHY_AQUANTIA
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| 	bool "Aquantia Ethernet PHYs support"
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| 	select PHY_GIGE
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| 	select PHYLIB_10G
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| 
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| config PHY_AQUANTIA_UPLOAD_FW
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| 	bool "Aquantia firmware loading support"
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| 	default n
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| 	depends on PHY_AQUANTIA
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| 	help
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| 		Aquantia PHYs use firmware which can be either loaded automatically
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| 		from storage directly attached to the phy or loaded by the boot loader
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| 		via MDIO commands.  The firmware is loaded from a file, specified by
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| 		the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
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| 
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| config PHY_AQUANTIA_FW_PART
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| 	string "Aquantia firmware partition"
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| 	depends on PHY_AQUANTIA_UPLOAD_FW
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| 	help
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| 		Partition containing the firmware file.
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| 
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| config PHY_AQUANTIA_FW_NAME
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| 	string "Aquantia firmware filename"
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| 	depends on PHY_AQUANTIA_UPLOAD_FW
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| 	help
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| 		Firmware filename.
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| 
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| config PHY_ATHEROS
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| 	bool "Atheros Ethernet PHYs support"
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| 
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| config PHY_BROADCOM
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| 	bool "Broadcom Ethernet PHYs support"
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| 
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| config PHY_CORTINA
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| 	bool "Cortina Ethernet PHYs support"
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| 
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| config SYS_CORTINA_NO_FW_UPLOAD
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| 	bool "Cortina firmware loading support"
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| 	default n
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| 	depends on PHY_CORTINA
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| 	help
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| 		Cortina phy has provision to store phy firmware in attached dedicated
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| 		EEPROM. And boards designed with such EEPROM does not require firmware
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| 		upload.
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| 
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| choice
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| 	prompt "Location of the Cortina firmware"
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| 	default SYS_CORTINA_FW_IN_NOR
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| 	depends on PHY_CORTINA
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| 
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| config SYS_CORTINA_FW_IN_MMC
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| 	bool "Cortina firmware in MMC"
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| 
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| config SYS_CORTINA_FW_IN_NAND
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| 	bool "Cortina firmware in NAND flash"
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| 
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| config SYS_CORTINA_FW_IN_NOR
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| 	bool "Cortina firmware in NOR flash"
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| 
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| config SYS_CORTINA_FW_IN_REMOTE
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| 	bool "Cortina firmware in remote device"
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| 
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| config SYS_CORTINA_FW_IN_SPIFLASH
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| 	bool "Cortina firmware in SPI flash"
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| 
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| endchoice
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| 
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| config PHY_CORTINA_ACCESS
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| 	bool "Cortina Access Ethernet PHYs support"
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| 	default y
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| 	depends on CORTINA_NI_ENET
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| 	help
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| 		Cortina Access Ethernet PHYs init process
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| 
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| config PHY_DAVICOM
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| 	bool "Davicom Ethernet PHYs support"
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| 
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| config PHY_ET1011C
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| 	bool "LSI TruePHY ET1011C support"
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| 
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| config PHY_LXT
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| 	bool "LXT971 Ethernet PHY support"
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| 
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| config PHY_MARVELL
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| 	bool "Marvell Ethernet PHYs support"
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| 
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| config PHY_MESON_GXL
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| 	bool "Amlogic Meson GXL Internal PHY support"
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| 
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| config PHY_MICREL
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| 	bool "Micrel Ethernet PHYs support"
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| 	help
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| 	  Enable support for the GbE PHYs manufactured by Micrel (now
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| 	  a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
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| 	  KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
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| 	  family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
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| 	  KSZ90x1 family support" is selected).
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| 
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| if PHY_MICREL
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| 
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| config PHY_MICREL_KSZ9021
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| 	bool
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| 	select PHY_MICREL_KSZ90X1
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| 
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| config PHY_MICREL_KSZ9031
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| 	bool
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| 	select PHY_MICREL_KSZ90X1
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| 
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| config PHY_MICREL_KSZ90X1
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| 	bool "Micrel KSZ90x1 family support"
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| 	select PHY_GIGE
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| 	help
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| 	  Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
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| 	  enabled, the extended register read/write for KSZ90x1 PHYs
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| 	  is supported through the 'mdio' command and any RGMII signal
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| 	  delays configured in the device tree will be applied to the
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| 	  PHY during initialization.
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| 
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| config PHY_MICREL_KSZ8XXX
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| 	bool "Micrel KSZ8xxx family support"
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| 	help
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| 	  Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
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| 	  (now a part of Microchip). This includes drivers for the KSZ804,
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| 	  KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
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| 
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| endif # PHY_MICREL
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| 
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| config PHY_MSCC
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| 	bool "Microsemi Corp Ethernet PHYs support"
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| 
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| config PHY_NATSEMI
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| 	bool "National Semiconductor Ethernet PHYs support"
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| 
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| config PHY_REALTEK
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| 	bool "Realtek Ethernet PHYs support"
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| 
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| config RTL8211E_PINE64_GIGABIT_FIX
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| 	bool "Fix gigabit throughput on some Pine64+ models"
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| 	depends on PHY_REALTEK
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| 	help
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| 	  Configure the Realtek RTL8211E found on some Pine64+ models differently to
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| 	  fix throughput on Gigabit links, turning off all internal delays in the
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| 	  process. The settings that this touches are not documented in the CONFREG
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| 	  section of the RTL8211E datasheet, but come from Realtek by way of the
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| 	  Pine64 engineering team.
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| 
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| config RTL8211X_PHY_FORCE_MASTER
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| 	bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
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| 	depends on PHY_REALTEK
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| 	help
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| 	  Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
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| 	  This can work around link stability and data corruption issues on gigabit
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| 	  links which can occur in slave mode on certain PHYs, e.g. on the
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| 	  RTL8211C(L).
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| 
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| 	  Please note that two directly connected devices (i.e. via crossover cable)
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| 	  will not be able to establish a link between each other if they both force
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| 	  master mode. Multiple devices forcing master mode when connected by a
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| 	  network switch do not pose a problem as the switch configures its affected
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| 	  ports into slave mode.
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| 
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| 	  This option only affects gigabit links. If you must establish a direct
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| 	  connection between two devices which both force master mode, try forcing
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| 	  the link speed to 100MBit/s.
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| 
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| 	  If unsure, say N.
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| 
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| config RTL8211F_PHY_FORCE_EEE_RXC_ON
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| 	bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
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| 	depends on PHY_REALTEK
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| 	default n
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| 	help
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| 	  The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
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| 	  transitions to/from a lower power consumption level (Low Power Idle
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| 	  mode) based on link utilization. When no packets are being
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| 	  transmitted, the system goes to Low Power Idle mode to save power.
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| 
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| 	  Under particular circumstances this setting can cause issues where
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| 	  the PHY is unable to transmit or receive any packet when in LPI mode.
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| 	  The problem is caused when the PHY is configured to stop receiving
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| 	  the xMII clock while it is signaling LPI. For some PHYs the bit
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| 	  configuring this behavior is set by the Linux kernel, causing the
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| 	  issue in U-Boot on reboot if the PHY retains the register value.
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| 
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| 	  Default n, which means that the PHY state is not changed. To work
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| 	  around the issues, change this setting to y.
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| 
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| config RTL8201F_PHY_S700_RMII_TIMINGS
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| 	bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
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| 	depends on PHY_REALTEK
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| 	help
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| 	  This provides an option to configure specific timing requirements (needed
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| 	  for proper PHY operations) for the PHY module present on ACTION SEMI S700
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| 	  based cubieboard7. Exact timing requiremnets seems to be SoC specific
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| 	  (and it's undocumented) that comes from vendor code itself.
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| 
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| config PHY_SMSC
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| 	bool  "Microchip(SMSC) Ethernet PHYs support"
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| 
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| config PHY_TERANETICS
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| 	bool "Teranetics Ethernet PHYs support"
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| 
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| config PHY_TI
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| 	bool "Texas Instruments Ethernet PHYs support"
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| 	---help---
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| 	  Adds PHY registration support for TI PHYs.
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| 
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| config PHY_TI_DP83867
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| 	select PHY_TI
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| 	bool "Texas Instruments Ethernet DP83867 PHY support"
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| 	---help---
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| 	  Adds support for the TI DP83867 1Gbit PHY.
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| 
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| config PHY_TI_GENERIC
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| 	select PHY_TI
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| 	bool "Texas Instruments Generic Ethernet PHYs support"
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| 	---help---
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| 	  Adds support for Generic TI PHYs that don't need special handling but
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| 	  the PHY name is associated with a PHY ID.
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| 
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| config PHY_VITESSE
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| 	bool "Vitesse Ethernet PHYs support"
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| 
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| config PHY_XILINX
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| 	bool "Xilinx Ethernet PHYs support"
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| 
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| config PHY_XILINX_GMII2RGMII
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| 	bool "Xilinx GMII to RGMII Ethernet PHYs support"
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| 	help
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| 	  This adds support for Xilinx GMII to RGMII IP core. This IP acts
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| 	  as bridge between MAC connected over GMII and external phy that
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| 	  is connected over RGMII interface.
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| 
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| config PHY_FIXED
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| 	bool "Fixed-Link PHY"
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| 	depends on DM_ETH
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| 	help
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| 	  Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
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| 	  connection (MII, RGMII, ...).
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| 	  There is nothing like autoneogation and so
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| 	  on, the link is always up with fixed speed and fixed duplex-setting.
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| 	  More information: doc/device-tree-bindings/net/fixed-link.txt
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| 
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| config PHY_NCSI
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| 	bool "NC-SI based PHY"
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| 	depends on DM_ETH
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| 
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| endif #PHYLIB
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