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	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			251 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			251 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /**
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|  * Copyright 2010-2011 Freescale Semiconductor
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|  * Author: Timur Tabi <timur@freescale.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  *
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|  * This file provides support for the ngPIXIS, a board-specific FPGA used on
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|  * some Freescale reference boards.
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|  *
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|  * A "switch" is black rectangular block on the motherboard.  It contains
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|  * eight "bits".  The ngPIXIS has a set of memory-mapped registers (SWx) that
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|  * shadow the actual physical switches.  There is also another set of
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|  * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be
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|  * used to override the values of the bits in the physical switches.
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|  *
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|  * The following macros need to be defined:
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|  *
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|  * PIXIS_BASE - The virtual address of the base of the PIXIS register map
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|  *
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|  * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value
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|  *    is used in the PIXIS_SW() macro to determine which offset in
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|  *    the PIXIS register map corresponds to the physical switch that controls
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|  *    the boot bank.
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|  *
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|  * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use.
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|  *
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|  * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK.
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|  *
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|  * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to
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|  *    boot from the alternate bank.
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|  */
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| 
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| #include <common.h>
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| #include <command.h>
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| #include <asm/io.h>
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| 
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| #include "ngpixis.h"
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| 
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| static u8 __pixis_read(unsigned int reg)
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| {
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| 	void *p = (void *)PIXIS_BASE;
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| 
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| 	return in_8(p + reg);
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| }
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| u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read")));
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| 
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| static void __pixis_write(unsigned int reg, u8 value)
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| {
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| 	void *p = (void *)PIXIS_BASE;
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| 
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| 	out_8(p + reg, value);
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| }
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| void pixis_write(unsigned int reg, u8 value)
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| 	__attribute__((weak, alias("__pixis_write")));
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| 
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| /*
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|  * Reset the board. This ignores the ENx registers.
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|  */
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| void __pixis_reset(void)
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| {
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| 	PIXIS_WRITE(rst, 0);
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| 
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| 	while (1);
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| }
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| void pixis_reset(void) __attribute__((weak, alias("__pixis_reset")));
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| 
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| /*
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|  * Reset the board.  Like pixis_reset(), but it honors the ENx registers.
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|  */
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| void __pixis_bank_reset(void)
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| {
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| 	PIXIS_WRITE(vctl, 0);
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| 	PIXIS_WRITE(vctl, 1);
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| 
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| 	while (1);
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| }
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| void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset")));
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| 
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| /**
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|  * Set the boot bank to the power-on default bank
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|  */
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| void __clear_altbank(void)
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| {
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| 	u8 reg;
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| 
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| 	/* Tell the ngPIXIS to use this the bits in the physical switch for the
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| 	 * boot bank value, instead of the SWx register.  We need to be careful
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| 	 * only to set the bits in SWx that correspond to the boot bank.
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| 	 */
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| 	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
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| 	reg &= ~PIXIS_LBMAP_MASK;
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| 	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
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| }
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| void clear_altbank(void) __attribute__((weak, alias("__clear_altbank")));
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| 
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| /**
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|  * Set the boot bank to the alternate bank
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|  */
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| void __set_altbank(void)
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| {
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| 	u8 reg;
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| 
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| 	/* Program the alternate bank number into the SWx register.
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| 	 */
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| 	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw);
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| 	reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK;
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| 	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg);
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| 
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| 	/* Tell the ngPIXIS to use this the bits in the SWx register for the
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| 	 * boot bank value, instead of the physical switch.  We need to be
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| 	 * careful only to set the bits in SWx that correspond to the boot bank.
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| 	 */
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| 	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
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| 	reg |= PIXIS_LBMAP_MASK;
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| 	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
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| }
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| void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
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| 
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| #ifdef DEBUG
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| static void pixis_dump_regs(void)
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| {
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| 	unsigned int i;
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| 
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| 	printf("id=%02x\n", PIXIS_READ(id));
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| 	printf("arch=%02x\n", PIXIS_READ(arch));
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| 	printf("scver=%02x\n", PIXIS_READ(scver));
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| 	printf("csr=%02x\n", PIXIS_READ(csr));
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| 	printf("rst=%02x\n", PIXIS_READ(rst));
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| 	printf("aux=%02x\n", PIXIS_READ(aux));
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| 	printf("spd=%02x\n", PIXIS_READ(spd));
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| 	printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0));
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| 	printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1));
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| 	printf("addr=%02x\n", PIXIS_READ(addr));
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| 	printf("data=%02x\n", PIXIS_READ(data));
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| 	printf("led=%02x\n", PIXIS_READ(led));
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| 	printf("vctl=%02x\n", PIXIS_READ(vctl));
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| 	printf("vstat=%02x\n", PIXIS_READ(vstat));
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| 	printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0));
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| 	printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr));
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| 	printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg));
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| 	printf("gmdbg=%02x\n", PIXIS_READ(gmdbg));
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| 	printf("sclk=%02x%02x%02x\n",
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| 	       PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
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| 	printf("dclk=%02x%02x%02x\n",
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| 	       PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
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| 	printf("watch=%02x\n", PIXIS_READ(watch));
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| 
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| 	for (i = 0; i < 8; i++) {
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| 		printf("SW%u=%02x/%02x ", i + 1,
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| 			PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
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| 	}
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| 	putc('\n');
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| }
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| #endif
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| 
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| void pixis_sysclk_set(unsigned long sysclk)
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| {
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| 	unsigned long freq_word;
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| 	u8 sclk0, sclk1, sclk2;
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| 
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| 	freq_word = ics307_sysclk_calculator(sysclk);
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| 	sclk2 = freq_word & 0xff;
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| 	sclk1 = (freq_word >> 8) & 0xff;
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| 	sclk0 = (freq_word >> 16) & 0xff;
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| 
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| 	/* set SYSCLK enable bit */
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| 	PIXIS_WRITE(vcfgen0, 0x01);
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| 
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| 	/* SYSCLK to required frequency */
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| 	PIXIS_WRITE(sclk[0], sclk0);
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| 	PIXIS_WRITE(sclk[1], sclk1);
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| 	PIXIS_WRITE(sclk[2], sclk2);
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| }
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| 
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| int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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| {
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| 	unsigned int i;
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| 	unsigned long sysclk;
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| 	char *p_altbank = NULL;
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| #ifdef DEBUG
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| 	char *p_dump = NULL;
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| #endif
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| 	char *unknown_param = NULL;
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| 
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| 	/* No args is a simple reset request.
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| 	 */
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| 	if (argc <= 1)
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| 		pixis_reset();
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| 
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| 	for (i = 1; i < argc; i++) {
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| 		if (strcmp(argv[i], "altbank") == 0) {
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| 			p_altbank = argv[i];
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| 			continue;
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| 		}
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| 
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| #ifdef DEBUG
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| 		if (strcmp(argv[i], "dump") == 0) {
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| 			p_dump = argv[i];
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| 			continue;
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| 		}
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| #endif
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| 		if (strcmp(argv[i], "sysclk") == 0) {
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| 			sysclk = simple_strtoul(argv[i + 1], NULL, 0);
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| 			i += 1;
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| 			pixis_sysclk_set(sysclk);
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| 			continue;
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| 		}
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| 
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| 		unknown_param = argv[i];
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| 	}
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| 
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| 	if (unknown_param) {
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| 		printf("Invalid option: %s\n", unknown_param);
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| 		return 1;
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| 	}
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| 
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| #ifdef DEBUG
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| 	if (p_dump) {
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| 		pixis_dump_regs();
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| 
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| 		/* 'dump' ignores other commands */
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| 		return 0;
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| 	}
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| #endif
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| 
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| 	if (p_altbank)
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| 		set_altbank();
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| 	else
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| 		clear_altbank();
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| 
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| 	pixis_bank_reset();
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| 
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| 	/* Shouldn't be reached. */
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_SYS_LONGHELP
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| static char pixis_help_text[] =
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| 	"- hard reset to default bank\n"
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| 	"pixis_reset altbank - reset to alternate bank\n"
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| #ifdef DEBUG
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| 	"pixis_reset dump - display the PIXIS registers\n"
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| #endif
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| 	"pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n";
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| #endif
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| 
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| U_BOOT_CMD(
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| 	pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
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| 	"Reset the board using the FPGA sequencer", pixis_help_text
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| 	);
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