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c525bb42aa
The noc register bit definition may be the same for different SoC while the offset of the register may be different, add the struction definition as common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
86 lines
1.5 KiB
C
86 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019 Rockchip Electronics Co., Ltd
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*/
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#ifndef _ASM_ARCH_SDRAM_MSCH_H
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#define _ASM_ARCH_SDRAM_MSCH_H
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union noc_ddrtiminga0 {
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u32 d32;
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struct {
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unsigned acttoact : 6;
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unsigned reserved0 : 2;
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unsigned rdtomiss : 6;
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unsigned reserved1 : 2;
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unsigned wrtomiss : 6;
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unsigned reserved2 : 2;
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unsigned readlatency : 8;
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} b;
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};
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union noc_ddrtimingb0 {
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u32 d32;
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struct {
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unsigned rdtowr : 5;
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unsigned reserved0 : 3;
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unsigned wrtord : 5;
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unsigned reserved1 : 3;
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unsigned rrd : 4;
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unsigned reserved2 : 4;
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unsigned faw : 6;
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unsigned reserved3 : 2;
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} b;
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};
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union noc_ddrtimingc0 {
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u32 d32;
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struct {
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unsigned burstpenalty : 4;
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unsigned reserved0 : 4;
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unsigned wrtomwr : 6;
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unsigned reserved1 : 18;
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} b;
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};
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union noc_devtodev0 {
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u32 d32;
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struct {
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unsigned busrdtord : 3;
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unsigned reserved0 : 1;
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unsigned busrdtowr : 3;
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unsigned reserved1 : 1;
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unsigned buswrtord : 3;
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unsigned reserved2 : 1;
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unsigned buswrtowr : 3;
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unsigned reserved3 : 17;
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} b;
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};
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union noc_ddrmode {
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u32 d32;
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struct {
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unsigned autoprecharge : 1;
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unsigned bypassfiltering : 1;
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unsigned fawbank : 1;
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unsigned burstsize : 2;
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unsigned mwrsize : 2;
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unsigned reserved2 : 1;
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unsigned forceorder : 8;
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unsigned forceorderstate : 8;
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unsigned reserved3 : 8;
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} b;
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};
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union noc_ddr4timing {
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u32 d32;
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struct {
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unsigned ccdl : 3;
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unsigned wrtordl : 5;
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unsigned rrdl : 4;
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unsigned reserved1 : 20;
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} b;
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};
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#endif
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