mirror of
				https://github.com/smaeul/u-boot.git
				synced 2025-10-31 03:58:17 +00:00 
			
		
		
		
	The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Stefan Roese <sr@denx.de>