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9973e3c614
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
297 lines
7.8 KiB
C
297 lines
7.8 KiB
C
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <board/cogent/dipsw.h>
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#include <board/cogent/lcd.h>
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#include <board/cogent/rtc.h>
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#include <board/cogent/par.h>
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#include <board/cogent/pci.h>
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/* ------------------------------------------------------------------------- */
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#if defined(CONFIG_8260)
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#include <ioports.h>
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/*
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* I/O Port configuration table
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*
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* if conf is 1, then that port pin will be configured at boot time
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* according to the five values podr/pdir/ppar/psor/pdat for that entry
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*/
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const iop_conf_t iop_conf_tab[4][32] = {
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/* Port A configuration */
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{ /* conf ppar psor pdir podr pdat */
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/* PA31 */ {0, 0, 0, 0, 0, 0},
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/* PA30 */ {0, 0, 0, 0, 0, 0},
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/* PA29 */ {0, 0, 0, 0, 0, 0},
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/* PA28 */ {0, 0, 0, 0, 0, 0},
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/* PA27 */ {0, 0, 0, 0, 0, 0},
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/* PA26 */ {0, 0, 0, 0, 0, 0},
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/* PA25 */ {0, 0, 0, 0, 0, 0},
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/* PA24 */ {0, 0, 0, 0, 0, 0},
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/* PA23 */ {0, 0, 0, 0, 0, 0},
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/* PA22 */ {0, 0, 0, 0, 0, 0},
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/* PA21 */ {0, 0, 0, 0, 0, 0},
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/* PA20 */ {0, 0, 0, 0, 0, 0},
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/* PA19 */ {0, 0, 0, 0, 0, 0},
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/* PA18 */ {0, 0, 0, 0, 0, 0},
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/* PA17 */ {0, 0, 0, 0, 0, 0},
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/* PA16 */ {0, 0, 0, 0, 0, 0},
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/* PA15 */ {0, 0, 0, 0, 0, 0},
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/* PA14 */ {0, 0, 0, 0, 0, 0},
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/* PA13 */ {0, 0, 0, 0, 0, 0},
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/* PA12 */ {0, 0, 0, 0, 0, 0},
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/* PA11 */ {0, 0, 0, 0, 0, 0},
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/* PA10 */ {0, 0, 0, 0, 0, 0},
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/* PA9 */ {1, 1, 0, 1, 0, 0},
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/* SMC2 TXD */
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/* PA8 */ {1, 1, 0, 0, 0, 0},
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/* SMC2 RXD */
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/* PA7 */ {0, 0, 0, 0, 0, 0},
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/* PA6 */ {0, 0, 0, 0, 0, 0},
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/* PA5 */ {0, 0, 0, 0, 0, 0},
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/* PA4 */ {0, 0, 0, 0, 0, 0},
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/* PA3 */ {0, 0, 0, 0, 0, 0},
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/* PA2 */ {0, 0, 0, 0, 0, 0},
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/* PA1 */ {0, 0, 0, 0, 0, 0},
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/* PA0 */ {0, 0, 0, 0, 0, 0}
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},
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{ /* conf ppar psor pdir podr pdat */
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/* PB31 */ {0, 0, 0, 0, 0, 0},
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/* PB30 */ {0, 0, 0, 0, 0, 0},
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/* PB29 */ {0, 0, 0, 0, 0, 0},
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/* PB28 */ {0, 0, 0, 0, 0, 0},
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/* PB27 */ {0, 0, 0, 0, 0, 0},
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/* PB26 */ {0, 0, 0, 0, 0, 0},
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/* PB25 */ {0, 0, 0, 0, 0, 0},
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/* PB24 */ {0, 0, 0, 0, 0, 0},
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/* PB23 */ {0, 0, 0, 0, 0, 0},
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/* PB22 */ {0, 0, 0, 0, 0, 0},
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/* PB21 */ {0, 0, 0, 0, 0, 0},
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/* PB20 */ {0, 0, 0, 0, 0, 0},
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/* PB19 */ {0, 0, 0, 0, 0, 0},
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/* PB18 */ {0, 0, 0, 0, 0, 0},
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/* PB17 */ {0, 0, 0, 0, 0, 0},
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/* PB16 */ {0, 0, 0, 0, 0, 0},
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/* PB15 */ {0, 0, 0, 0, 0, 0},
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/* PB14 */ {0, 0, 0, 0, 0, 0},
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/* PB13 */ {0, 0, 0, 0, 0, 0},
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/* PB12 */ {0, 0, 0, 0, 0, 0},
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/* PB11 */ {0, 0, 0, 0, 0, 0},
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/* PB10 */ {0, 0, 0, 0, 0, 0},
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/* PB9 */ {0, 0, 0, 0, 0, 0},
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/* PB8 */ {0, 0, 0, 0, 0, 0},
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/* PB7 */ {0, 0, 0, 0, 0, 0},
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/* PB6 */ {0, 0, 0, 0, 0, 0},
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/* PB5 */ {0, 0, 0, 0, 0, 0},
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/* PB4 */ {0, 0, 0, 0, 0, 0},
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/* PB3 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PB2 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PB1 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PB0 */ {0, 0, 0, 0, 0, 0}
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/* pin doesn't exist */
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},
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{ /* conf ppar psor pdir podr pdat */
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/* PC31 */ {0, 0, 0, 0, 0, 0},
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/* PC30 */ {0, 0, 0, 0, 0, 0},
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/* PC29 */ {0, 0, 0, 0, 0, 0},
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/* PC28 */ {0, 0, 0, 0, 0, 0},
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/* PC27 */ {0, 0, 0, 0, 0, 0},
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/* PC26 */ {0, 0, 0, 0, 0, 0},
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/* PC25 */ {0, 0, 0, 0, 0, 0},
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/* PC24 */ {0, 0, 0, 0, 0, 0},
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/* PC23 */ {0, 0, 0, 0, 0, 0},
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/* PC22 */ {0, 0, 0, 0, 0, 0},
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/* PC21 */ {0, 0, 0, 0, 0, 0},
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/* PC20 */ {0, 0, 0, 0, 0, 0},
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/* PC19 */ {0, 0, 0, 0, 0, 0},
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/* PC18 */ {0, 0, 0, 0, 0, 0},
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/* PC17 */ {0, 0, 0, 0, 0, 0},
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/* PC16 */ {0, 0, 0, 0, 0, 0},
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/* PC15 */ {0, 0, 0, 0, 0, 0},
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/* PC14 */ {0, 0, 0, 0, 0, 0},
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/* PC13 */ {0, 0, 0, 0, 0, 0},
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/* PC12 */ {0, 0, 0, 0, 0, 0},
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/* PC11 */ {0, 0, 0, 0, 0, 0},
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/* PC10 */ {0, 0, 0, 0, 0, 0},
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/* PC9 */ {0, 0, 0, 0, 0, 0},
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/* PC8 */ {0, 0, 0, 0, 0, 0},
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/* PC7 */ {0, 0, 0, 0, 0, 0},
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/* PC6 */ {0, 0, 0, 0, 0, 0},
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/* PC5 */ {0, 0, 0, 0, 0, 0},
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/* PC4 */ {0, 0, 0, 0, 0, 0},
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/* PC3 */ {0, 0, 0, 0, 0, 0},
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/* PC2 */ {0, 0, 0, 0, 0, 0},
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/* PC1 */ {0, 0, 0, 0, 0, 0},
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/* PC0 */ {0, 0, 0, 0, 0, 0}
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},
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{ /* conf ppar psor pdir podr pdat */
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/* PD31 */ {0, 0, 0, 0, 0, 0},
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/* PD30 */ {0, 0, 0, 0, 0, 0},
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/* PD29 */ {0, 0, 0, 0, 0, 0},
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/* PD28 */ {0, 0, 0, 0, 0, 0},
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/* PD27 */ {0, 0, 0, 0, 0, 0},
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/* PD26 */ {0, 0, 0, 0, 0, 0},
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/* PD25 */ {0, 0, 0, 0, 0, 0},
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/* PD24 */ {0, 0, 0, 0, 0, 0},
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/* PD23 */ {0, 0, 0, 0, 0, 0},
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/* PD22 */ {0, 0, 0, 0, 0, 0},
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/* PD21 */ {0, 0, 0, 0, 0, 0},
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/* PD20 */ {0, 0, 0, 0, 0, 0},
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/* PD19 */ {0, 0, 0, 0, 0, 0},
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/* PD18 */ {0, 0, 0, 0, 0, 0},
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/* PD17 */ {0, 0, 0, 0, 0, 0},
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/* PD16 */ {0, 0, 0, 0, 0, 0},
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/* PD15 */ {1, 1, 1, 0, 0, 0},
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/* I2C SDA */
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/* PD14 */ {1, 1, 1, 0, 0, 0},
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/* I2C SCL */
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/* PD13 */ {0, 0, 0, 0, 0, 0},
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/* PD12 */ {0, 0, 0, 0, 0, 0},
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/* PD11 */ {0, 0, 0, 0, 0, 0},
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/* PD10 */ {0, 0, 0, 0, 0, 0},
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/* PD9 */ {1, 1, 0, 1, 0, 0},
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/* SMC1 TXD */
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/* PD8 */ {1, 1, 0, 0, 0, 0},
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/* SMC1 RXD */
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/* PD7 */ {0, 0, 0, 0, 0, 0},
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/* PD6 */ {0, 0, 0, 0, 0, 0},
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/* PD5 */ {0, 0, 0, 0, 0, 0},
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/* PD4 */ {0, 0, 0, 0, 0, 0},
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/* PD3 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PD2 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PD1 */ {0, 0, 0, 0, 0, 0},
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/* pin doesn't exist */
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/* PD0 */ {0, 0, 0, 0, 0, 0}
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/* pin doesn't exist */
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}
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};
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#endif /* CONFIG_8260 */
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/* ------------------------------------------------------------------------- */
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/*
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* Check Board Identity:
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*/
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int checkboard (void)
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{
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puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a "
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COGENT_CPU_MODULE " CPU Module\n");
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations while still
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* running in flash
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*/
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int misc_init_f (void)
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{
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printf ("DIPSW: ");
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dipsw_init ();
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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phys_size_t initdram (int board_type)
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{
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#ifdef CONFIG_CMA111
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return (32L * 1024L * 1024L);
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#else
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unsigned char dipsw_val;
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int dual, size0, size1;
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long int memsize;
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dipsw_val = dipsw_cooked ();
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dual = dipsw_val & 0x01;
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size0 = (dipsw_val & 0x08) >> 3;
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size1 = (dipsw_val & 0x04) >> 2;
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if (size0)
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if (size1)
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memsize = 16L * 1024L * 1024L;
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else
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memsize = 1L * 1024L * 1024L;
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else if (size1)
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memsize = 4L * 1024L * 1024L;
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else {
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printf ("[Illegal dip switch settings - assuming 16Mbyte SIMMs] ");
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memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */
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}
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if (dual)
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memsize *= 2L;
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return (memsize);
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#endif
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations after monitor
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* has been relocated into ram
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*/
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int misc_init_r (void)
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{
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printf ("LCD: ");
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lcd_init ();
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#if 0
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printf ("RTC: ");
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rtc_init ();
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printf ("PAR: ");
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par_init ();
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printf ("KBM: ");
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kbm_init ();
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printf ("PCI: ");
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pci_init ();
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#endif
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return (0);
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}
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