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			127 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			127 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2004, Freescale, Inc
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|  * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  *
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|  */
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| 
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| /*
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|  * Minimal serial functions needed to use one of the PSC ports
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|  * as serial console interface.
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|  */
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| 
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| #include <common.h>
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| #include <mpc8220.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| #define PSC_BASE   MMAP_PSC1
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| 
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| #if defined(CONFIG_PSC_CONSOLE)
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| int serial_init (void)
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| {
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| 	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
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| 	u32 counter;
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| 
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| 	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
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| 	psc->cr = 0;
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| 	psc->ipcr_acr = 0;
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| 	psc->isr_imr = 0;
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| 
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| 	/* write to CSR: RX/TX baud rate from timers */
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| 	psc->sr_csr = 0xdd000000;
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| 
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| 	psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;
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| 
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| 	/* Setting up BaudRate */
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| 	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
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| 	counter++;
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| 
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| 	/* write to CTUR: divide counter upper byte */
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| 	psc->ctur = ((counter & 0xff00) << 16);
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| 	/* write to CTLR: divide counter lower byte */
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| 	psc->ctlr = ((counter & 0x00ff) << 24);
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| 
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| 	psc->cr = PSC_CR_RST_RX_CMD;
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| 	psc->cr = PSC_CR_RST_TX_CMD;
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| 	psc->cr = PSC_CR_RST_ERR_STS_CMD;
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| 	psc->cr = PSC_CR_RST_BRK_INT_CMD;
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| 	psc->cr = PSC_CR_RST_MR_PTR_CMD;
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| 
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| 	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
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| 	return (0);
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| }
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| 
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| void serial_putc (const char c)
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| {
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| 	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
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| 
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| 	if (c == '\n')
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| 		serial_putc ('\r');
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| 
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| 	/* Wait for last character to go. */
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| 	while (!(psc->sr_csr & PSC_SR_TXRDY));
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| 
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| 	psc->xmitbuf[0] = c;
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| }
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| 
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| void serial_puts (const char *s)
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| {
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| 	while (*s) {
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| 		serial_putc (*s++);
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| 	}
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| }
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| 
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| int serial_getc (void)
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| {
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| 	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
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| 
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| 	/* Wait for a character to arrive. */
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| 	while (!(psc->sr_csr & PSC_SR_RXRDY));
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| 	return psc->xmitbuf[2];
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| }
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| 
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| int serial_tstc (void)
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| {
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| 	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
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| 
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| 	return (psc->sr_csr & PSC_SR_RXRDY);
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| }
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| 
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| void serial_setbrg (void)
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| {
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| 	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
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| 	u32 counter;
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| 
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| 	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
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| 	counter++;
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| 
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| 	/* write to CTUR: divide counter upper byte */
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| 	psc->ctur = ((counter & 0xff00) << 16);
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| 	/* write to CTLR: divide counter lower byte */
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| 	psc->ctlr = ((counter & 0x00ff) << 24);
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| 
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| 	psc->cr = PSC_CR_RST_RX_CMD;
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| 	psc->cr = PSC_CR_RST_TX_CMD;
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| 
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| 	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
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| }
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| #endif /* CONFIG_PSC_CONSOLE */
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