mirror of
https://github.com/smaeul/u-boot.git
synced 2025-11-04 05:50:17 +00:00
316328f59d
Add a driver which locates the available XHCI controllers on the PCI bus and makes them available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/*
|
|
* Copyright (c) 2015, Google, Inc
|
|
* Written by Simon Glass <sjg@chromium.org>
|
|
* All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <errno.h>
|
|
#include <pci.h>
|
|
#include <usb.h>
|
|
|
|
#include "xhci.h"
|
|
|
|
/*
|
|
* Create the appropriate control structures to manage a new XHCI host
|
|
* controller.
|
|
*/
|
|
int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
|
|
struct xhci_hcor **ret_hcor)
|
|
{
|
|
struct xhci_hccr *hccr;
|
|
struct xhci_hcor *hcor;
|
|
pci_dev_t pdev;
|
|
uint32_t cmd;
|
|
int len;
|
|
|
|
pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index);
|
|
if (pdev < 0) {
|
|
printf("XHCI host controller not found\n");
|
|
return -1;
|
|
}
|
|
|
|
hccr = (struct xhci_hccr *)pci_map_bar(pdev,
|
|
PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
|
|
len = HC_LENGTH(xhci_readl(&hccr->cr_capbase));
|
|
hcor = (struct xhci_hcor *)((uint32_t)hccr + len);
|
|
|
|
debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
|
|
(uint32_t)hccr, (uint32_t)hcor, len);
|
|
|
|
*ret_hccr = hccr;
|
|
*ret_hcor = hcor;
|
|
|
|
/* enable busmaster */
|
|
pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
|
|
cmd |= PCI_COMMAND_MASTER;
|
|
pci_write_config_dword(pdev, PCI_COMMAND, cmd);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Destroy the appropriate control structures corresponding * to the XHCI host
|
|
* controller
|
|
*/
|
|
void xhci_hcd_stop(int index)
|
|
{
|
|
}
|