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763bad3e1c
Add a new method to acpi_ops to let drivers fill out ACPI MADT. The code is unused for now until drivers implement the new ops. TEST: Booted on QEMU sbsa using driver model generated MADT. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org>
128 lines
3.4 KiB
C
128 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Based on acpi.c from coreboot
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*
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* Copyright (C) 2024 9elements GmbH
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*/
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#define LOG_CATEGORY LOGC_ACPI
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#include <string.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpi_device.h>
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#include <acpi/acpi_table.h>
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#include <dm/acpi.h>
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#include <dm/uclass.h>
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void acpi_write_madt_gicc(struct acpi_madt_gicc *gicc, uint cpu_num,
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uint perf_gsiv, ulong phys_base, ulong gicv,
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ulong gich, uint vgic_maint_irq, u64 gicr_base,
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ulong mpidr, uint efficiency)
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{
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memset(gicc, '\0', sizeof(struct acpi_madt_gicc));
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gicc->type = ACPI_APIC_GICC;
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gicc->length = sizeof(struct acpi_madt_gicc);
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gicc->cpu_if_num = cpu_num;
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gicc->processor_id = cpu_num;
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gicc->flags = ACPI_MADTF_ENABLED;
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gicc->perf_gsiv = perf_gsiv;
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gicc->phys_base = phys_base;
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gicc->gicv = gicv;
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gicc->gich = gich;
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gicc->vgic_maint_irq = vgic_maint_irq;
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gicc->gicr_base = gicr_base;
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gicc->mpidr = mpidr;
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gicc->efficiency = efficiency;
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}
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void acpi_write_madt_gicd(struct acpi_madt_gicd *gicd, uint gic_id,
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ulong phys_base, uint gic_version)
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{
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memset(gicd, '\0', sizeof(struct acpi_madt_gicd));
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gicd->type = ACPI_APIC_GICD;
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gicd->length = sizeof(struct acpi_madt_gicd);
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gicd->gic_id = gic_id;
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gicd->phys_base = phys_base;
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gicd->gic_version = gic_version;
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}
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void acpi_write_madt_gicr(struct acpi_madt_gicr *gicr,
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u64 discovery_range_base_address,
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u32 discovery_range_length)
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{
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memset(gicr, '\0', sizeof(struct acpi_madt_gicr));
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gicr->type = ACPI_APIC_GICR;
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gicr->length = sizeof(struct acpi_madt_gicr);
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gicr->discovery_range_base_address = discovery_range_base_address;
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gicr->discovery_range_length = discovery_range_length;
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}
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void acpi_write_madt_its(struct acpi_madt_its *its,
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u32 its_id,
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u64 physical_base_address)
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{
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memset(its, '\0', sizeof(struct acpi_madt_its));
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its->type = ACPI_APIC_ITS;
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its->length = sizeof(struct acpi_madt_its);
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its->gic_its_id = its_id;
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its->physical_base_address = physical_base_address;
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}
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int acpi_pptt_add_proc(struct acpi_ctx *ctx, const u32 flags, const u32 parent,
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const u32 proc_id, const u32 num_resources,
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const u32 *resource_list)
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{
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struct acpi_pptt_proc *proc = ctx->current;
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int offset;
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offset = ctx->current - ctx->tab_start;
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proc->hdr.type = ACPI_PPTT_TYPE_PROC;
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proc->flags = flags;
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proc->parent = parent;
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proc->proc_id = proc_id;
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proc->num_resources = num_resources;
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proc->hdr.length = sizeof(struct acpi_pptt_proc) +
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sizeof(u32) * num_resources;
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if (resource_list)
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memcpy(proc + 1, resource_list, sizeof(u32) * num_resources);
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acpi_inc(ctx, proc->hdr.length);
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return offset;
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}
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int acpi_pptt_add_cache(struct acpi_ctx *ctx, const u32 flags,
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const u32 next_cache_level, const u32 size,
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const u32 sets, const u8 assoc, const u8 attributes,
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const u16 line_size)
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{
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struct acpi_pptt_cache *cache = ctx->current;
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int offset;
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offset = ctx->current - ctx->tab_start;
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cache->hdr.type = ACPI_PPTT_TYPE_CACHE;
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cache->hdr.length = sizeof(struct acpi_pptt_cache);
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cache->flags = flags;
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cache->next_cache_level = next_cache_level;
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cache->size = size;
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cache->sets = sets;
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cache->assoc = assoc;
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cache->attributes = attributes;
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cache->line_size = line_size;
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acpi_inc(ctx, cache->hdr.length);
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return offset;
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}
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void *acpi_fill_madt(struct acpi_madt *madt, struct acpi_ctx *ctx)
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{
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uclass_probe_all(UCLASS_CPU);
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uclass_probe_all(UCLASS_IRQ);
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/* All SoCs must use the driver model */
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acpi_fill_madt_subtbl(ctx);
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return ctx->current;
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}
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